Intel
ยฎ
EP80579 Integrated Processor Product Line May 2010
Order Number: 320068-005US 346
System Memory Interface (Memory Down)โIntel
ยฎ
EP80579 Integrated Processor Product Line
B.6.6.1 DDR_SLWCRES, DDR_RCOMPX, DRV_CRES, & DDR_CRES0
The DDR_SLWCRES, DDR_RCOMPX, DRV_CRES, and DDR_CRES0 signals are
compensation resistors for slew rate, impedance, and common return, respectively.
Intel recommends 20 mil wide traces with a minimum spacing of 12 mils from other
signals. When breaking out from the EP80579, maintain a minimum spacing of 4.5 mils
up to a maximum length of 500 mils. For the best signal integrity, minimize this length
as much as possible. Figure B-13 shows the routing topology for these signals.
B.6.6.2 DDR_CRES1, DDR_CRES2
The EP80579 provides the DDR_CRES1 and DDR_CRES2 signals as additional
compensation resistors (See Figure B-14). Route the signal as microstrip, with a
maximum length of 500 mils and minimized DC resistance.
Figure B-13. DDR_SLWCRES, DDR_RCOMPX, DDV_CRES, & DDR_CRES0 Routing Topology
DDR_RCOMPX
249 ฮฉ, 1%
825
ฮฉ, 1%
DDR_CRES0
DRV_CRES
DDR_SLWCRES
825 ฮฉ, 1%