Intel
ยฎ
EP80579 Integrated Processor Product LineโHigh-Speed Design Concerns
Intel
ยฎ
EP80579 Integrated Processor Product Line
Platform Design Guide May 2010
46 Order Number: 320068-005US
5.4.4 Trace Mismatch and Compensation
The following rules describe how to handle trace mismatch (see Figure 19 and
Figure 20 for additional examples):
โข If the trace segment between the bend corners is greater than 600 mils, adjust the
mismatch to be less than 1 mil. See Figure 18.
โข Match the overall length of a differential pair within 5 mils.
โข Match the overall length between two adjacent differential pairs within 1000 mils.
โข All trace segments must be matched within 2 mils.
โข Adjust the trace length near the mismatch. See Figure 17.
โข The length compensation must be performed by working on a unified direction (a
north to south or south to north, but not both).
Figure 16. Trace Segment Length
Equalization Length of
Segments
Maintain the Lateral Symmetry
Figure 17. Trace Mismatch
Escape Routing Trace Length Adjusted Near Mismatch
* Watch out for
the length reporti ng issues in
Allegro and other routing tools.