Intel
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EP80579 Integrated Processor Product Line May 2010
Order Number: 320068-005US 21
IntroductionโIntel
ยฎ
EP80579 Integrated Processor Product Line
1.2 Acronyms and Terminology
Universal Serial Bus Specification
http://www.usb.org/developers/
docs.html
High Speed USB Platform Design Guidelines
http://www.usb.org/developers/
docs.html
82551QM/82540EM Interchangeable LOM Design Guide
Application Note
http://developer.intel.com
82540EM Gigabit Ethernet Controller Datasheet and Hardware
Design Guide
http://developer.intel.com
Notes:
1. For the latest revision and documentation number, contact your local Intel field representative.
Table 2. Acronyms and Terminology (Sheet 1 of 3)
Acronym Definition
ACPI
Advanced Configuration and Power Interface Specification, an industry specification of the
common interfaces enabling robust operating system (OS)-directed motherboard device
configuration and power management of both devices and entire systems.
AHCI
Advanced Host Controller Interface, an industry specification of the interface between
memory and SATA devices.
AIOC Acceleration and I/O Complex
AMC
1. Advanced Mezzanine Card
2. Audio/Modem Codec
ARP Address Resolution Protocol
BER Bit Error Rate
BGA Ball Grid Array
CMC Common Mode Choke
CM Coherent Memory
CMI Core interface, Memory controller hub, I/O controller hub
COTS
Commercial off-the-shelf-: Generally technology or computer products, that are ready-
made and available for sale, lease, or license to the general public.
CRC Cyclic Redundancy Check
DAC Digital-to-Analog Converter
DDR
DDR SDRAM (Double Data Rate Synchronous Dynamic Random Access Memory), a system
memory technology.
DDR2 Double Data Rate Synchronous Dynamic Random Access Memory, second generation.
DED Double-bit Error Detect
D2D Digital-to-Digital converter (voltage regulator)
DMA
Direct Memory Access, the hardware function when a peripheral accesses data in the
memory in computer system without CPU intervention.
DW
Double Word, a legacy reference to 32 bits of data on a naturally aligned four-byte
boundary (i.e. the least significant two bits of the byte address are b00). This is a legacy
term used by PCI and must not be used in any other context.
E2E (e2e) Edge-to-Edge
ECC Error Checking and Correction
Table 1. Reference Documents (Sheet 2 of 2)
Item
Document
Number/Source