Intel EP80579 Guide

Intel
®
EP80579 Integrated Processor Product Line May 2010
Order Number: 320068-005US 244
Local Expansion Bus (LEB) Interface—Intel
®
EP80579 Integrated Processor Product Line
22.3.5 Mezzanine Card Interconnect
In order to isolate external plug-in cards and to relieve the loading to the LEB bus, it is
recommended to make use of bidirectional buffers. The buffers do not support hot-plug
however this is a feature that can be implemented in other designs with some
additional logic. Depending of the buffers used, it might or might not be required to use
series damping resistors. The Development Board uses the 74LVC16245 bidirectional
buffers, which do not required series damping resistor. However other application might
vary, specially if customers are designing new cards or the drive strength of the
peripherals used might vary, or simply if the speed of the LEB bus is increased.
Figure 150 and Table 91 are very similar to those above, except that the secondary
bridge is isolated through the buffers.
Table 90. Address, Data and Control Star Topology Routing Guidelines
Parameter Routing Constraints
Routing Layer Stripline Microstrip
Reference Plane Ground Referenced
Board Trace Impedance 50 Ω 50 Ω
Trace Width 4.5mils (L3/L8) 5.5mils (L1/L10)
Address\Data\Control to Other Signals
Spacing
10 mils (min) 12 mils (min)
EP80579 Address\Data\Control
Breakout Length
(LADDR_Brk_out\LDC_Brk_out)
1 inch (max) 1 inch (max)
EP80579 Address\Data\Control
(LADDR_Total\LDC_Total)
max = 14 inch max = 14 inch
EP80579 Address\Data\Control
Breakin Length
(LADDR_Brk_out\LDC_Brk_out)
1.5 inch (max) 1.5 inch (max)
Address Pull Down Strapping Resistor
(as required for your specific design)
1 KΩ (5%)) 1 KΩ (5%)
Breakout\Breakin Spacing (e2e) 4 mils (min) 4 mils (min)
TL1 5 inch (max) 5 inch (max)
TL2 4 inch (max) 4 inch (max)
TL3 1.5 inch (max) 1.5 inch (max)

Intel EP80579 Specifications

General

Brand	Intel
Model	EP80579
Category	Computer Hardware
Language	English