Intel
ยฎ
EP80579 Integrated Processor Product Line May 2010
Order Number: 320068-005US 185
System Management Bus (SMBus) InterfaceโIntel
ยฎ
EP80579 Integrated Processor Product
Line
Figure 122. System Management SIO Implementation
SIO
System Management
Connector
GP
SMC_SECURE
_MODE_KB
Notes:
1. This is an example for the EP80579 SMBus interface implementation in the EP80579
Development Board. This diagram idoes not present every signal. See the EP80579 Development
Board schematics for more details.
2. The Optional BMC connection is not implemented in the EP80579 Development Board.
CTSM#
EMP_CTS#
DCDM#
EMP_DCD#
DSRM#
EMP_DSR#
DTRM# EMP_DTR#
RTSM#
EMP_RTS
SINM
EMP_SIN
SOUTM EMP_SOUT
EMP_RI
EMP_XCVR_DISA
BLE
SMC_RI
EMP_XCVR_
DISABLE
FANOUT
(PWM2)
CTS1#
DCD1#
DSR1#
DTR1#
RTS1#
RXD1
TXD1
RI1
LAD[3:0]
LFRAME#
LDRQ#
LCLK
SERIRQ#
FANIN_x
(FANTACHn)
FANOUT
(PWM1)
FET
AMP
PWM
FAN
PWM
FAN
PWM
FAN
PWM
FAN
3.3V
3.3V
10
kO
10
kO
3.3V
3.3V
10
kO
10
kO
Aux Fan
EP80579 Fan
3.3V
10
kO
3.3V
10
kO
FET
AMP
PWM
FAN
PWM
FAN
Internal Serial Port
(Header: 2x5)
RS232 Transceiver
RI1
TXD1
RXD1
RTS1_N
DTR1_N
DSR1_N
DCD1_N
CTS1_N
RI
TXD
RXD
RTS
DTR
DSR
DCD
CTS
SPKR
RTEST#
GPIO
SERIRQ
PCICLK
LAD[3:0]
LFRAME#
LDRQ0#
GPIO
SUSCLK
LPC_SERIRQ
SMC_33MHZ_CLK
LPC_AD[3:0]
LPC_FRAME#
LPC_DRQ#
OEM_GPIO1
SUS_CLK
CK410
CLK_
33
3.3V
8.2
kO
3.3V
8.2 kO
100 O
SMC_CARD_
PRESENCE1#
SMC_SPKR#
SMC_CLR_CMOS#
SMC_CARD_
PRESENCE2#
0 O
0 O
Aux Fan
OPTIONAL BMC Connection
(not implemented in EP80579
DP)
SDA
SCLK
EP80579
SMBCLK
SMBDATA