GigaDevice Semiconductor GD32F3x0 - Page 208

GD32F3x0 User Manual
208
1: Non-inverting input above inverting input and the output is high
13:12
CMP0HST[1:0]
CMP0 hysteresis
These bits are used to control the hysteresis level.
00: No hysteresis
01: Low hysteresis
10: Medium hysteresis
11: High hysteresis
11
CMP0PL
Polarity of CMP0 output
This bit is used to select the polarity of CMP0 output.
0 : Output is not inverted
1 : Output is inverted
10:8
CMP0OSEL[2:0]
Comparator 0 output selection
These bits are used to select the destination of the CMP0 output.
000: no selection
001: TIMER0 break input
010: TIMER0 channel0 input capture
011: TIMER0 OCPRE_CLR input
100: TIMER1 channel3 input capture
101: TIMER1 OCPRE_CLR input
110: TIMER2 channel0 input capture
111: TIMER2 OCPRE_CLR input
7
Reserved
Must be kept at reset value.
6:4
CMP0MSEL[2:0]
CMP0_IM input selection
These bits are used to select the source connected to the CMP0_IM input of the
CMP0.
000: V
REFINT
/4
001: V
REFINT
/2
010: V
REFINT
*3/4
011: V
REFINT
100: PA4 (DAC)
101: PA5
110: PA0
111: Reserved
3:2
CMP0M[1:0]
CMP0 mode
These bits are used to control the operating mode.
00: High speed / full power
01: Medium speed / medium power
10: Low speed / low power
11: Very-low speed / ultra-low power
1
CMP0SW
CMP0 switch