Intel
®
EP80579 Integrated Processor Product Line—Contents
Intel
®
EP80579 Integrated Processor Product Line May 2010
12 Order Number: 320068-005US
96 PCI Express Down Device with LAI Connector Routing (EP80579 Transmit) ..................... 148
97 PCI Express Down Device With LAI Connector Routing (EP80579 Receive) ..................... 149
98 SATA Layout and Routing Example..................................................................................... 152
99 SATA Tx and Rx Signal Routing Topology .......................................................................... 154
100 SATA PCB Routing .............................................................................................................. 155
101 SATA Trace Spacing............................................................................................................ 156
102 SATA_RBIASp/SATA_RBIASn Connection......................................................................... 157
103 SATALED# Circuitry Example.............................................................................................. 158
104 SATA Cable 90º Bend Height Example ............................................................................... 159
105 SATA Host Connector Placement Region Recommendations............................................. 159
106 SATA Host Connector Placement ATX Area B .................................................................... 160
107 Example of Poor Host Connector Placement....................................................................... 161
108 Minimum Host Connector Placement Spacing (From SATA Specification) ......................... 161
109 USB Trace Lengths From Controller to Connector .............................................................. 165
110 USB Trace Lengths For EP80579 Front Panel Solution ...................................................... 166
111 USB Trace Lengths For Optional Front Panel Option .......................................................... 167
112 (Microstrip) Recommended USB Trace Spacing ................................................................. 167
113 (Stripline) Recommended USB Trace Spacing .................................................................... 168
114 USB_RBIASp/USB_RBIASn Connection............................................................................. 169
115 Good Downstream Power Connection ................................................................................. 170
116 A Common Mode Choke ...................................................................................................... 171
117 Front Panel Header Schematic ............................................................................................ 174
118 Motherboard Front Panel USB Support ............................................................................... 175
119 SMBus 2.0 / SMLink Interface.............................................................................................. 177
120 High Power/Low Power Mixed Suspend/Core Power Well Architecture .............................. 178
121 Development Board System Management - SMBus Block Diagram ................................... 182
122 System Management SIO Implementation........................................................................... 184
123 LPC Interface Diagram.........................................................................................................186
124 Development Board LPC Interface Block Diagram .............................................................. 187
125 Topology of LPC Interface....................................................................................................187
126 TPM 1.1/EP80579 Block Diagram........................................................................................ 189
127 TPM 1.2/EP80579 Block Diagram........................................................................................ 189
128 FWH VPP Isolation Circuitry ................................................................................................ 191
129 RTCX1 and SUSCLK Relationship in EP80579................................................................... 192
130 External Circuitry for the RTC .............................................................................................. 193
131 A Schottky Diode Circuit to Connect RTC External Battery ................................................. 195
132 RTEST# External Circuit for the RTC................................................................................... 196
133 SPI Topology (System BIOS Only) ...................................................................................... 199
134 SIU Interface Interconnect.................................................................................................... 207
135 GbE Controller/LAN Interface Interconnect.......................................................................... 209
136 GbE RGMII Mode Signal Connection Block Diagram .......................................................... 215
137 GbE RMII Mode Signal Connection Block Diagram ............................................................. 216
138 GbE RGMII Transmit Path Clock Topology.......................................................................... 218
139 GbE RGMII Transmit Path Data\Control Topology .............................................................. 220
140 GbE RGMII Receive Path Clock Topology........................................................................... 222
141 GbE RGMII Receive Path Data/Clock/Control Topology ..................................................... 224
142 Classic Clock Synchronization Example .............................................................................. 229
143 EP80579 IEEE 1588-2008 Hardware Assist Block Diagram................................................ 231
144 CAN Physical Interface Example ......................................................................................... 234
145 CAN Multipoint Topology......................................................................................................235
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