Intel
®
EP80579 Integrated Processor Product Line May 2010
Order Number: 320068-005US 292
Schematics Checklist—Intel
®
EP80579 Integrated Processor Product Line
GP34_IRQ34 I/O
• Input/Output configurable if
used as GPIO[34].
• Can be used as IRQ[34]
• No external pull-up required if used
in IRQ mode.
Note:
• Must be pulled high through a 10
KΩ resistor if not used.
• Resides in Core Power Well
GP40_IRQ35 I
• Input only if used as GPIO[40].
• Can be used as IRQ[35]
• No external pull-up required if used
in IRQ mode.
Note:
• Must be pulled high through a 10
KΩ resistor if not used.
• Resides in Core Power Well
GP41_LDRQ[1]# I
• Input only if used as GPIO[41].
• Can be used as LPC DMA
Request input (LDRQ[1])
• 50KΩ internal pull-up
• No external Pullup Required
GPIO[48] O • Output Only (GPO).
• 50KΩ internal pull-up
• No external Pullup Required
•Should not be pulled down.
IICH Interrupts
SERIRQ I
• Connect to SuperIO (SIO)
SER_IRQ pin
• Serial Interrupt Request. This signal
implements the serial interrupt
protocol.
Note:
• Must be pulled high through a 10
KΩ resistor if used in PIRQ mode.
• Resides in Core Power Well
Firmware Hub/Low Pin Count (FWH/LPC) Interface
LAD[3:0],
LFRAME#,
I/O
• No external pull-ups required.
• Connect straight to FWH/TPM/
SuperIO/Port80 Display
LDRQ[0]# I
• Connect to SuperIO LDRQ#
output
• 50KΩ internal pull-up
• No external Pullup Required
•Should not be pulled down.
LDRQ[1]# (GPIO[41]) See General Purpose I/O (GPIO) Interface
PCICLK I
• Connect to one of six sets of
33 MHz clock outputs from
CK410 Clock Synthesizer
• Connect clocks through 33 Ω
±5% series resistor
Note:
•See Section 2.3
Serial Peripheral Interface (SPI) - System BIOS Topology
SPI_MOSI O
• Connect to the serial data input
pin of the flash device.
• Connect signal
through a 15Ω
±1% series resistor
• Place resistor close to EP80579
Note:
• Can be left as NC when the port is
not connected to an interfacing
device.
Table 100. Schematic Checklist (Sheet 9 of 26)
Checklist Items
I/O Type
(Default)
Recommendations Comments