Intel
ยฎ
EP80579 Integrated Processor Product LineโSchematics Checklist
Intel
ยฎ
EP80579 Integrated Processor Product Line
Platform Design Guide May 2010
309 Order Number: 320068-005US
Reserved10
โข Must have a 330ฮฉ pull-up to
VCCPSUS (EP80579 3.3V
sustain power) if used to
connect to TESTIN# signal on
the ITP Debug Port.
โข Must have a 10Kฮฉ pull-up to
VCCPSUS (EP80579 3.3V
sustain power) if not used
Reserved11 Must be connected to VSS
Reserved12
Must have external 10Kฮฉ pull-down
to VSS
Reserved13
Must have external 10Kฮฉ pull-down
to VSS
Reserved14
Must have external 10Kฮฉ pull-down
to VSS
Reserved15 Must be connected to VSS
Reserved16
Must have external 10Kฮฉ pull-up to
3.3V (EP80579 3.3V power)
Reserved17 Must be connected to VSS
Reserved18
Must have external 10Kฮฉ pull-down
to VSS
Reserved19
Reserved20
Must have external 10Kฮฉ pull-up to
3.3V (EP80579 3.3V power)
No Connect Pins
Note: (Except for NC56 Pull-down termination, all other No Connect (NC) Pins must be left unconnected)
NC_SUS_TWO
NC_TWO
NC7
NC9 - NC22
NC34 - NC38
NC40 - NC48
NC50 - NC55
NC56
Must have external 10Kฮฉ pull-down
to VSS
NC57-NC59
Table 100. Schematic Checklist (Sheet 26 of 26)
Checklist Items
I/O Type
(Default)
Recommendations Comments