Intel
®
EP80579 Integrated Processor Product Line May 2010
Order Number: 320068-005US 314
Schematics Checklist—Intel
®
EP80579 Integrated Processor Product Line
XTAL_IN/XTAL_OUT
• Connect to a 14.318-MHz crystal, placed
within 500 mils of CK410 device.
• It is recommended to use 33 pF external
load capacitors
VTT_PWRGD#/PD
• Connect to Platform VRMPWRGD signal after
a 2ms delay.
• VTT_PWRGD# is a 3.3V LVTTL input. It acts
as a level sensitive strobe to latch the FS
pins and other multiplexed inputs. After
VTT_PWRGD# assertion, it becomes a real
time input for asserting power down.
VDD_PCI[1:0],
VDD_CPU,
VDD_SRC[3:1],
VDD_REF,
VDD_48,
VDD_A
CK410 Power Pins
• Connect to VCC3
•See Section 8.3.4 for Power Filtering and
Decoupling guidelines
VSS_48,
VSS_SRC,
VSS_CPU,
VSS_PCI[1:0],
VSS_REF
VSS_A
CK410 Ground Pins
• Connect to GND
•See Section 8.3.4 for Ground Filtering and
Decoupling guidelines
Table 102. CK410 Schematic Checklist (Sheet 3 of 3)
Pin Name
System
Pull-up/Pull-down
Series
Resistor
Recommendations