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Freescale Semiconductor PowerPC e500 Core - Page 356

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PowerPC e500 Core Family Reference Manual, Rev. 1
10-20 Freescale Semiconductor
Auxiliary Processing Units (APUs)
efdtstlt efdtstlt
Floating-Point Double-Precision Test Less Than
efdtstlt crfD,rA,rB
alrA
0:63
blrB
0:63
if (al < bl) then cl1
else cl0
CR
4*crD:4*crD+3
undefined || cl || undefined || undefined
rA is compared against rB. If rA is less than rB, the bit in the crfD is set, otherwise it is cleared.
Comparison ignores the sign of 0 (+0 = -0). The comparison proceeds after treating NaNs,
Infinities, and Denorms as normalized numbers, using their values of e’ and ‘f’ directly.
No exceptions are generated during the execution of efdtstlt. If strict IEEE 754 compliance is
required, the program should use efdcmplt.
0 5689101115162021 31
000100 crfD00 rA rB 0 1011111101

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