Freescale Semiconductor PowerPC e500 Core - EIS-Specific Simplified Mnemonics; Integer Select (Isel; SPE Mnemonics

PowerPC e500 Core Family Reference Manual, Rev. 1
C-26 Freescale Semiconductor
Simplified Mnemonics for PowerPC Instructions
C.10 EIS-Specific Simplified Mnemonics
This section describes simplified mnemonics for instructions defines by auxiliary processing units
(APUs) defined as part of the Motorola Book E implementation standards (EIS).
C.10.1 Integer Select (isel)
The following mnemonics simplify the most common variants of the isel instruction that access
CR0:
Integer Select Less Than
isellt rD,rA,rB equivalent to isel rD,rA,rB,0
Integer Select Greater Than
iselgt rD,rA,rB equivalent to isel rD,rA,rB,1
Integer Select Equal
iseleq rD,rA,rB equivalent to isel rD,rA,rB,2
C.10.2 SPE Mnemonics
The following mnemonic handles moving of the full 64-bit SPE GPR:
Vector Move
evmr rD,rA equivalent to evor rD,rA,rA
The following mnemonic performs a complement register:
Vector Not
evnot rD,rA equivalent toevnor rD,rA,rA
C.11 Comprehensive List of Simplified Mnemonics
Table C-29 lists simplified mnemonics that are supported by the e500 processor. Note that
compiler designers may implement additional simplified mnemonics not listed here.
Table C-29. Simplified Mnemonics
Simplified Mnemonic Mnemonic Instruction
bctr
1
bcctr 20,0 Branch unconditionally (bcctr without LR update)
bctrl
1
bcctrl 20,0 Branch unconditionally (bcctrl with LR Update)
bdnz target
1
bc 16,0,target Decrement CTR, branch if CTR ≠ 0 (bc without LR
update)
bdnza target
1
bca 16,0,target Decrement CTR, branch if CTR ≠ 0 (bca without LR
update)