Freescale Semiconductor PowerPC e500 Core - Convert to Double-Precision Floating-Point from Integer Word with Saturation

Auxiliary Processing Units (APUs)
PowerPC e500 Core Family Reference Manual, Rev. 1
Freescale Semiconductor 10-25
if (guard) then
if (sticky | (result & 0x00000001)) then
result ← result + 1
else if ((SPEFSCR
FRMC
& 0b10) = 0b10) then // infinity modes
// implementation dependent
if (signed = SIGN) then
if (fp
sign
= 1) then
result ← ¬result + 1
return result
10.4.5.3 Convert to Double-Precision Floating-Point from Integer Word with
Saturation
// Convert from integer/fractional to 64 bit floating point
// signed = SIGN or UNSIGN
// fractional = F (fractional) or I (integer)
CnvtI32ToFP64Sat(v, signed, fractional)
FP64format result;
result
sign
← 0
if (v = 0) then
result ← 0
SPEFSCR
FG
← 0
SPEFSCR
FX
← 0
else
if (signed = SIGN) then
if (v
0
= 1) then
v ← ¬v + 1
result
sign
← 1
if (fractional = F) then // fractional bit pos alignment
maxexp ← 1023
if (signed = UNSIGN) then
maxexp ← maxexp - 1
else
maxexp ← 1054 // integer bit pos alignment
sc ← 0
while (v
0
= 0)
v ← v << 1
sc ← sc + 1
v
0
← 0 // clear U bit
result
exp
← maxexp - sc
// Report sticky and guard bits
SPEFSCR
FG
← 0
SPEFSCR
FX
← 0
result
frac
← v
1:31
||
21
0
return result