Freescale Semiconductor PowerPC e500 Core - Convert from Double-Precision Floating-Point to Integer Word with Saturation

Auxiliary Processing Units (APUs)
PowerPC e500 Core Family Reference Manual, Rev. 1
Freescale Semiconductor 10-23
return ((fp
exp
= 0) & (fp
frac
≠ 0))
// Signal a Floating Point Error in the SPEFSCR
SignalFPError(upper_lower, bits)
if (upper_lower = UPPER) then
bits ← bits << 15
SPEFSCR ← SPEFSCR | bits
bits ← (FG | FX)
if (upper_lower = UPPER) then
bits ← bits << 15
SPEFSCR ← SPEFSCR & ¬bits
// Round a result
Round32(fp, guard, sticky)
FP32format fp;
if (SPEFSCR
FINXE
= 0) then
if (SPEFSCR
FRMC
= 0b00) then // nearest
if (guard) then
if (sticky | fp
frac[22]
) then
v
0:23
← fp
frac
+ 1
if v
0
then
if (fp
exp
>= 254) then
// overflow
fp ← fp
sign
|| 0b11111110 ||
23
1
else
fp
exp
← fp
exp
+ 1
fp
frac
← v
1:23
else
fp
frac
← v
1:23
else if ((SPEFSCR
FRMC
& 0b10) = 0b10) then // infinity modes
// implementation dependent
return fp
// Round a result
Round64(fp, guard, sticky)
FP32format fp;
if (SPEFSCR
FINXE
= 0) then
if (SPEFSCR
FRMC
= 0b00) then // nearest
if (guard) then
if (sticky | fp
frac[51]
) then
v
0:52
← fp
frac
+ 1
if v
0
then
if (fp
exp
>= 2046) then
// overflow
fp ← fp
sign
|| 0b11111111110 ||
52
1
else
fp
exp
← fp
exp
+ 1
fp
frac
← v
1:52
else
fp
frac
← v
1:52
else if ((SPEFSCR
FRMC
& 0b10) = 0b10) then // infinity modes
// implementation dependent
return fp
10.4.5.2 Convert from Double-Precision Floating-Point to Integer Word with
Saturation
// Convert 64 bit floating point to integer/fractional
// signed = SIGN or UNSIGN
// round = ROUND or TRUNC
// fractional = F (fractional) or I (integer)