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GigaDevice Semiconductor GD32F3x0 - Page 634

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GD32F3x0 User Manual
634
Reset value: 0x0000 0000
This register contains the status and events of a channel, when software gets a channel
interrupt, it should read this register for the respective channel to know the source of the
interrupt. The flag bits in this register are all set by hardware and cleared by writing 1.
This register has to be accessed by word (32-bit)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
DTER
REQOVR
BBER
USBER
Reserved.
ACK
NAK
STALL
Reserved.
CH
TF
rc_w1
rc_w1
rc_w1
rc_w1
rc_w1
rc_w1
rc_w1
rc_w1
rc_w1
Bits
Fields
Descriptions
31:11
Reserved
Must be kept at reset value
10
DTER
Data toggle error
The IN transaction gets a data packet but the PID of this packet doesn’t match DPID [1:0]
bits in USBFS_HCHxLEN register.
9
REQOVR
Request queue overrun
The periodic request queue is full when software starts new transfers.
8
BBER
Babble error
A babble condition occurs on USB bus. A typical reason for babble condition is that a
device sends a data packet and the packet length exceeds the endpoint’s maximum
packet length.
7
USBER
USB Bus Error
The USB error flag is set when the following conditions occurs during receiving a packet:
– A received packet has a wrong CRC field
– A stuff error detected on USB bus
– Timeout when waiting for a response packet
6
Reserved
Must be kept at reset value
5
ACK
ACK
An ACK response is received or transmitted
4
NAK
NAK
A NAK response is received.

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