Intel
ยฎ
EP80579 Integrated Processor Product LineโSchematics Checklist
Intel
ยฎ
EP80579 Integrated Processor Product Line
Platform Design Guide May 2010
289 Order Number: 320068-005US
GPIO[10:8] I โข Input Only (GPI).
โข Must be pulled high through a 10
Kฮฉ resistor if not used.
โข Resides in Suspend Power Well
GP11_SMBALERT# I
โข Input Only if used as GPI.
โข Can be used as SMBus Alert:
Wake System or generate SMI#
โข Must be pulled high through a 10
Kฮฉ resistor if used for SMBALERT#
or if not used
โข Resides in Suspend Power Well
GPIO[13:12] I โข Input Only GPI.
โข Must be pulled high through a 10
Kฮฉ resistor if not used.
โข Resides in Core Power Well
GPIO[15:14] I โข Input Only (GPI).
โข Must be pulled high through a 10
Kฮฉ resistor if not used.
โข Resides in Suspend Power Well
GP16_IRQ24 I/O
โข Input/Output configurable if
used as GPIO[16].
Strapping Options:
A16 Overide Strap
โข This strap selects the treatment
of A16 for cycles going to BIOS
space (but not feature space) in
the FWH.
EP80579 interprets this strap as
follows:
โข 0 = EP80579 does not invert
A16
โข 1 = EP80579 inverts A16 on
some BIOS cycles (default =
1)
Note:
โข Since there is an internal pull-
up, there is no need for an
external pull-up for the system
to operate in the default state.
โข Pull to GND with 1Kฮฉ ยฑ 5%
resistor to overide the
inversion.
โข This signal can function as either
GPIO[16] or IRQ[24].
โข Resides in Core Power Well
โข 50Kฮฉ internal pull-up.
GP17_IRQ25 I/O
โข Input/Output configurable if
used as GPIO[17].
โข Can be strapped for SPI Boot-
up
โข Can be used as IRQ[25]
โข This pin, in conjuction with
GP33_IRQ33, can be strapped
to select the source of BIOS
during boot-up.
โข Since GP17 and GP33 have
internal pull-ups, the default
boot up is set to FWH. GP17
and GP33 should be strapped to
ground through 1Kฮฉ pull-down
resistors to configure the boot
source to the SPI Flash
โข This signal can function as either
GPIO[17] or IRQ[25].
โข 50Kฮฉ internal pull-up
Boot BIOS Selection Strap: This strap
selects the source of the BIOS during
boot.
EP80579 interprets GP17 & GP33
strappings as follows:
GP17 GP33 (Boot Options)
0 0 Boot BIOS from SPI
0 1 Reserved
1 0 Reserved
1 1 (Default) Boot BIOS from LPC
โขSee Table 74 for more details
Table 100. Schematic Checklist (Sheet 6 of 26)
Checklist Items
I/O Type
(Default)
Recommendations Comments