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Intel EP80579 Guide

Intel EP80579
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Intel
ยฎ
EP80579 Integrated Processor Product Lineโ€”Schematics Checklist
Intel
ยฎ
EP80579 Integrated Processor Product Line
Platform Design Guide May 2010
289 Order Number: 320068-005US
GPIO[10:8] I โ€ข Input Only (GPI).
โ€ข Must be pulled high through a 10
Kฮฉ resistor if not used.
โ€ข Resides in Suspend Power Well
GP11_SMBALERT# I
โ€ข Input Only if used as GPI.
โ€ข Can be used as SMBus Alert:
Wake System or generate SMI#
โ€ข Must be pulled high through a 10
Kฮฉ resistor if used for SMBALERT#
or if not used
โ€ข Resides in Suspend Power Well
GPIO[13:12] I โ€ข Input Only GPI.
โ€ข Must be pulled high through a 10
Kฮฉ resistor if not used.
โ€ข Resides in Core Power Well
GPIO[15:14] I โ€ข Input Only (GPI).
โ€ข Must be pulled high through a 10
Kฮฉ resistor if not used.
โ€ข Resides in Suspend Power Well
GP16_IRQ24 I/O
โ€ข Input/Output configurable if
used as GPIO[16].
Strapping Options:
A16 Overide Strap
โ€ข This strap selects the treatment
of A16 for cycles going to BIOS
space (but not feature space) in
the FWH.
EP80579 interprets this strap as
follows:
โ€ข 0 = EP80579 does not invert
A16
โ€ข 1 = EP80579 inverts A16 on
some BIOS cycles (default =
1)
Note:
โ€ข Since there is an internal pull-
up, there is no need for an
external pull-up for the system
to operate in the default state.
โ€ข Pull to GND with 1Kฮฉ ยฑ 5%
resistor to overide the
inversion.
โ€ข This signal can function as either
GPIO[16] or IRQ[24].
โ€ข Resides in Core Power Well
โ€ข 50Kฮฉ internal pull-up.
GP17_IRQ25 I/O
โ€ข Input/Output configurable if
used as GPIO[17].
โ€ข Can be strapped for SPI Boot-
up
โ€ข Can be used as IRQ[25]
โ€ข This pin, in conjuction with
GP33_IRQ33, can be strapped
to select the source of BIOS
during boot-up.
โ€ข Since GP17 and GP33 have
internal pull-ups, the default
boot up is set to FWH. GP17
and GP33 should be strapped to
ground through 1Kฮฉ pull-down
resistors to configure the boot
source to the SPI Flash
โ€ข This signal can function as either
GPIO[17] or IRQ[25].
โ€ข 50Kฮฉ internal pull-up
Boot BIOS Selection Strap: This strap
selects the source of the BIOS during
boot.
EP80579 interprets GP17 & GP33
strappings as follows:
GP17 GP33 (Boot Options)
0 0 Boot BIOS from SPI
0 1 Reserved
1 0 Reserved
1 1 (Default) Boot BIOS from LPC
โ€ขSee Table 74 for more details
Table 100. Schematic Checklist (Sheet 6 of 26)
Checklist Items
I/O Type
(Default)
Recommendations Comments

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Intel EP80579 Specifications

General IconGeneral
BrandIntel
ModelEP80579
CategoryComputer Hardware
LanguageEnglish

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