Intel EP80579 - Page 290

Intel
®
EP80579 Integrated Processor Product Line May 2010
Order Number: 320068-005US 290
Schematics Checklist—Intel
®
EP80579 Integrated Processor Product Line
GP18_IRQ36 I/O
• Input/Output configurable if
used as GPIO[18].
• Can be used as IRQ[36]
• 50KΩ internal pull-up
• No external Pullup Required
•
Note:
• Do not strap or drive this signal low
during power-up until the CPURST#
signal is de-asserted.
GP19_IRQ37 I/O
• Input/Output configurable if
used as GPIO[19].
• Can be used as IRQ[37]
• 50KΩ internal pull-up
• No external Pullup Required
Note:
• Do not strap or drive this signal low
during power-up until the CPURST#
signal is de-asserted.
GP20_IRQ26 I/O
• Input/Output configurable if
used as GPIO[20].
• Can be used as IRQ[26]
• No external pull-up required if used
in IRQ mode.
Note:
• Must be pulled high through a 10
KΩ resistor if not used.
• Resides in Core Power Well
GP21_IRQ27 I/O
• Input/Output configurable if
used as GPIO[21].
• Can be used as IRQ[27]
• 50KΩ internal pull-up
• No external Pullup Required
Note:
• Do not strap or drive this signal low
during power-up until the CPURST#
signal is de-asserted.
GP23_IRQ28 I/O
• Input/Output configurable if
used as GPIO[23].
• Can be used as IRQ[28]
• 50KΩ internal pull-up
• No external Pullup Required
Note:
• Do not strap or drive this signal low
during power-up until the CPURST#
signal is de-asserted.
GP24_IRQ29 I/O
• Input/Output configurable if
used as GPIO[24].
• Can be used as IRQ[29]
• No external pull-up required if used
in IRQ mode.
Note:
• Must be pulled high through a 10
KΩ resistor if not used.
• Resides in Suspend Power Well
GP25_IRQ38 I/O
• Input/Output configurable if
used as GPIO[25].
• Can be used as IRQ[38]
• No external pull-up required if used
in IRQ mode.
Note:
• Must be pulled high through a 10
KΩ resistor if not used.
• Resides in Suspend Power Well
GP26_SATA0GP I
• Input Only if used as GPI.
• Can be used as SATA Port 0
Interlock switch Status Input
depending on the platform
•SATAOGP:
Interlock Switch Status Port0:
0 = Closed
1 = Open
• Must be pulled high through a 10
KΩ resistor if not used.
• Resides in Core Power Well
Table 100. Schematic Checklist (Sheet 7 of 26)
Checklist Items
I/O Type
(Default)
Recommendations Comments