Intel
ยฎ
EP80579 Integrated Processor Product Line May 2010
Order Number: 320068-005US 294
Schematics ChecklistโIntel
ยฎ
EP80579 Integrated Processor Product Line
INTRUDER# I
โข Connect to EP80579 VCCPRTC
(VBAT) through a 1Mฮฉ resistor
โข SMBus Intruder Detect: Detects if
the system case has been opened.
Can be set to disables the system if
the box is detected open. This input
signal is in the RTC well. This pin's
status is readable, so it can be used
like a GPI if the Intruder switch is
not needed
SMBALERT# (GPIO[11]) See General Purpose I/O (GPIO) Interface
Serial Interface Unit (SIU or UART) Interface
SIU_CTS[2:1]# I/O
โข Connect signals appropriately
to RS-232 Transceiver
โข UART Port[2:1] Clear to Send:
Active low, these pins indicate that
data can be exchanged between
UARTs and the external interfaces.
Note:
โข Must be pulled high through a 10
Kฮฉ resistor when the port is not
connected to an interfacing device
SIU_DCD[2:1]# I/O
โข Connect signals appropriately
to RS-232 Transceiver
โข UART Port[2:1] Data Carrier Detect:
Active low, these pins indicate that
data carrier has been detected by
the external agents for UART
port[2:1].
Note:
โข Must be pulled high through a 10
Kฮฉ resistor when the port is not
connected to an interfacing device
SIU_DSR[2:1]# I/O
โข Connect signals appropriately
to RS-232 Transceiver
โข UART Port[2:1] Data Set Ready:
Active low, these pins indicate that
the external agents are ready to
communicate with UART port[2:1].
Note:
โข Must be pulled high through a 10
Kฮฉ resistor when the port is not
connected to an interfacing device
Table 100. Schematic Checklist (Sheet 11 of 26)
Checklist Items
I/O Type
(Default)
Recommendations Comments