Intel EP80579 Guide

Intel
®
EP80579 Integrated Processor Product Line May 2010
Order Number: 320068-005US 296
Schematics Checklist—Intel
®
EP80579 Integrated Processor Product Line
SIU_RXD[2:1] I/O
• Connect signals appropriately
to RS-232 Transceiver
• UART Port[2:1]Serial Data Input:
Serial data input form external
devices to the receive UART port
[2:1].
Note:
• Must be pulled high through a 10
KΩ resistor when the port is not
connected to an interfacing device
SIU_TXD[2:1] I/O
• Connect signals appropriately
to RS-232 Transceiver
Strapping Options:
SIU_TXD[2] -
(GPIO IRQ Capability Strap)
• 0 = GPIO IRQ Capability
enabled
• 1 = GPIO IRQ Capability
disabled
Note: (default = 0) Connect
SIU_TXD[2] through a 510
Ω pull-down resistor to
ground to enable IRQ
capability
• UART Port[2:1] Serial Data Output:
Serial data output to the
communication peripheral/modem
or data set for UART port [2:1].
Upon reset, the TXD pins will be set
to MARKING condition (logic ‘1’
state).
• Signals have 50KΩ internal pull-ups
Note:
• SIU_TXD[2] needs to be strapped
appropriately even if the port is not
used or not connected to an
interfacing device.
• SIU_TXD[1] can be left as no
connect (NC) if the port is not used.
UART_CLK I
• Connect to 48 MHz clock
(USB_48) from the CK410
Clock Synthesizer
• Connect clock through a 33 Ω
±5% series resistor.
Note:
•Both UART_CLK and USB_CLK
(CLK48) use the same clock output
(USB_48) from the CK410 Clock
Synthesizer.
• Isolate UART_CLK from USB_CLK
(CLK48) through 33 Ω ±5% series
resistors
• Connect UART_CLK to a 48 MHz
clock source even when the SIU
ports are not connected to any
interfacing device.
•See Section 2.3
Serial ATA (SATA) Interface
SATA_TXp[1:0],
SATA_TXn[1:0],
SATA_RXp[1:0],
SATA_RXn[1:0]
I/O
Requires series AC coupling
capacitors:
• Connect 0.01µF ±10%
capacitor on each data line
between EP80579 and SATA
connector.
Note:
If a SATA port is not used or connected
to an interfacing device, terminate the
signals as follows:
• SATA_RXp/SATA_RXn, SATA_TXp/
SATA_TXn signals may be left as no
connect (NC)
SATA_RBIAS
SATA_RBIAS#
I
SATA Bias Resistor
• Short signals SATA_RBIAS to
SATA_RBIAS# at package.
• Pull down shorted signal
through a
24.9Ω ±1% resistor to
ground
.
Note:
• Tie SATA_RBIAS and SATA_RBIAS#
together and connect to GND
through a
24.9Ω ±1% resistor even
when the SATA port is not used or
connected to an interfacing device.
SATA_CLKREFp,
SATA_CLKREFn
I
• Connect to SRC_4_SATAp/n
(100 MHz) clock outputs of the
CK410 Clock Synthesizer.
• Connect clocks through 33 Ω
±5% series resistors
•
Connect clocks through 49.9Ω ±1%
resistors to ground
Note:
•Connect SATA_CLKREFp/
SATA_CLKREFn to a 100 MHz clock
source even if the SATA port is not
used or connected to an interfacing
device.
•See Section 2.3
Table 100. Schematic Checklist (Sheet 13 of 26)
Checklist Items
I/O Type
(Default)
Recommendations Comments

Intel EP80579 Specifications

General

Brand	Intel
Model	EP80579
Category	Computer Hardware
Language	English