Intel EP80579 Guide

Intel
®
EP80579 Integrated Processor Product Line—Schematics Checklist
Intel
®
EP80579 Integrated Processor Product Line
Platform Design Guide May 2010
299 Order Number: 320068-005US
SUS_STAT# O • Can monitor using an LED.
• Suspend State Status: Asserted to
indicate that the system is entering
into a low power state.
Note:
• This signal can be left as a no
connect (NC) if not used
SUSCLK O
• Connect to SuperIO (SIO)
CLKI32 (32.768 kHz) input.
• Suspend Clock. Output clock from
RTC clock generator circuit.
Note:
• This signal can be left as a no
connect (NC) if not used.
• This signal can be exposed via a
testpoint for debug purposes if not
used.
VRMPWRGD I
• This signal is connected to the
IA-32 core Voltage Regulator
power good output signal.
• IA-32 core Voltage Regulator Power
Good.
IICH Miscellaneous Signals
CLK14 I
• Connect to REF clock (14 MHz)
from the CK410 Clock
Synthesizer
• Connect clock through a 33 Ω
±5% series resistor.
• Timer Oscillator Clock: Used for
8254 timers and HPET (High
Precision Event Timer). Runs at
14.31818 MHz. This clock stops
(and should be low) during S3 and
S5 state. CLK14 must be accurate
to within 500ppm over 100usecs
(and longer periods) in order to
meet HPET accuracy requirements
•See Section 2.3
PE_HPINTR# I
• On platforms that support PCI
Express Hot-Plug, pull this pin
up to EP80579 3.3 V (VCC33)
with 1 kΩ ±5% resistor.
Connect to an output of the
Hot-Plug I/O expander logic.
• On platforms that do not
support PCI Express Hot-Plug,
pull up to EP80579 3.3V
(VCC33) supply through a 10
KΩ ±5% resistor.
Note: Because PCI Express Hot Plug is
not supported in EP80579, this
pin must be pulled up to
EP80579 3.3V (VCC33) supply
through a 10 KΩ ±5% resistor
BSEL O
FSB Frequency Indicator.
• Driven by CPU to indicated FSB
Frequency.
•See Section 6.2 for more
details.
• The BSEL and V_SEL signals are
outputs from EP80579 to reflect the
internal strapping of the various
EP80579 SKUs. The BSEL and
V_SEL signals are interpreted to
indicate the FSB frequency and CPU
power requirements for the various
SKUs.
•See Section 6.2 for more details.
Note:
• The V_SEL signal is an open drain
(OD) I/O signal that requires an
external 10K pull-up. It can also be
pulled to GND on the Platform to
configure a EP80579 1.2GHz SKUed
part to operate at 1.066GHz
frequency.
V_SEL I/OD
IA-32 core Voltage Select Indicator:
• Driven by EP80579 to indicate
CPU SKU voltage requirements.
• Requires an external 10K pull-
up to Platform 3.3V
•See Section 6.2 for more
details.
WDT_TOUT# O • Can be monitored using an LED
WatchDog Timer Output. Used by
Platform Management Controller to
reset EP80579
Table 100. Schematic Checklist (Sheet 16 of 26)
Checklist Items
I/O Type
(Default)
Recommendations Comments

Intel EP80579 Specifications

General

Brand	Intel
Model	EP80579
Category	Computer Hardware
Language	English