Intel EP80579 - Page 301

Intel
®
EP80579 Integrated Processor Product Line—Schematics Checklist
Intel
®
EP80579 Integrated Processor Product Line
Platform Design Guide May 2010
301 Order Number: 320068-005US
GBEn_TxCLK
O
RGMII Mode
• Interconnect each Port Transmit
Clock (GBEn_TxCLK) to the
corresponding Port Transmit
Clock of the RGMII PHY Device
• Pull up GBE Port 0 Transmit
Clock signal to EP80579 2.5V
Standby Voltage (VCCSUS25)
using a 1.2KΩ ± 5% resistor.
• Pull up GBE Port 1&2 Transmit
Clock signals to GBE 2.5V
using
a
1.2KΩ ± 5% resistors.
• Leave the clock of any unused
Port as no connect.
RMII Mode
• Not used in this mode.
• Leave all Transmit clock signals as
no connect.
Note:
• Can be left as NC when the port is not used in either mode.
GBEn_TxCTL
O
RGMII Mode
• Interconnect each Port Transmit
Control (GBEn_TxCTL) to the
corresponding Port Transmit
Enable (TX_EN) of the RGMII
PHY Device
• Pull up GBE Port 0 Transmit
Control signal to EP80579 2.5V
Standby Voltage (VCCSUS25)
using a 1.2KΩ ± 5% resistor.
• Pull up GBE Port 1&2 Transmit
Control signals to GBE 2.5V
using a 1.2KΩ ± 5% resistors.
• Leave the control signal of any
unused Port as no connect.
RMII Mode
• Interconnect each Port Transmit
Control (GBEn_TxCTL) to the
corresponding Port Transmit Enable
(TX_EN) of the RMII PHY Device
• Pull up GBE Port 0 Transmit Control
signal to EP80579 3.3V Standby
Voltage (VCCGBEPSUS)
using a
1.2KΩ ± 5% resistor.
• Pull up GBE Port 1&2 Transmit
Control signals to GBE 3.3V
using a
1.2KΩ ± 5% resistors
• Leave the control signal of any
unused Port as no connect
Note:
• Can be left as NC when the port is not used in either mode.
GBEn_RxDATA[3:0]
I
RGMII Mode
• Interconnect each Port Receive
Data (GBEn_RxDATA[3:0]) to
the corresponding Port Receive
Data of the RGMII PHY Device
• Pull up GBE Port 0 Receive Data
signals to EP80579 2.5V
Standby Voltage (VCCSUS25)
using a 1.2KΩ ± 5% resistors.
• Pull up GBE Port 1&2 Receive
Data signals to GBE 2.5V
using a
1.2KΩ ± 5% resistors.
• Pull-down all unused Receive
Data signals to GND
using 10
KΩ
resistors
RMII Mode
• Interconnect the lower two bits of
each Port Receive Data
(GBEn_RxDATA[1:0]) to the
corresponding Port Receive Data of
the RMII PHY Device.
• Connect each Port Receive Data bit3
(GBEn_RxDATA[3]) to the
corresponding Port Receive Error
signal (RX_ER) of the RMII PHY
Device
• Pull up GBE Port 0 Receive Data
signals to EP80579 3.3V Standby
Voltage (VCCGBEPSUS)
using a
1.2KΩ ± 5% resistors.
• Pull up GBE Port 1&2 Receive Data
signals to GBE 3.3V
using a 1.2KΩ ±
5%
resistors
• Pull-down all unused Receive Data
signals to GND
using 10 KΩ resistors
Note:
• Pull-down all Receive Data signals to GND
using 10 KΩ resistors when the port is not
used in either mode
Table 100. Schematic Checklist (Sheet 18 of 26)
Checklist Items
I/O Type
(Default)
Recommendations Comments