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Intel EP80579 Guide

Intel EP80579
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Intel
ยฎ
EP80579 Integrated Processor Product Line May 2010
Order Number: 320068-005US 302
Schematics Checklistโ€”Intel
ยฎ
EP80579 Integrated Processor Product Line
GBEn_RxCLK
I
RGMII Mode
โ€ข Interconnect each Port Receive
Clock (GBEn_RxCLK) to the
corresponding Port Receive
Clock of the RGMII PHY Device
โ€ข Pull up GBE Port 0 Receive
Clock signal to EP80579 2.5V
Standby Voltage (VCCSUS25)
using a 1.2Kฮฉ ยฑ 5% resistor.
โ€ข Pull up GBE Port 1&2 Receive
Clock signals to GBE 2.5V
using
a
1.2Kฮฉ ยฑ 5% resistors.
โ€ข Pull-down all unused Receive
Clock signals to GND
using 10
Kฮฉ
resistors.
RMII Mode
โ€ข No used in this mode
โ€ข Pull-down all Receive Clock signals
to GND
using 10 Kฮฉ resistors
Note:
โ€ข Pull-down all Receive Clock signals to GND
using 10 Kฮฉ resistors when the port is not
used in either mode
GBEn_RxCTL
I
RGMII Mode
โ€ข Interconnect each Port Receive
Control (GBEn_RxCTL) to the
corresponding Port Receive
Data Valid (RX_DV) of the
RGMII PHY Device
โ€ข Pull up GBE Port 0 Receive
Control signal to EP80579 2.5V
Standby Voltage (VCCSUS25)
using a 1.2Kฮฉ ยฑ 5% resistor.
โ€ข Pull up GBE Port 1&2 Receive
Control signals to GBE 2.5V
using a 1.2Kฮฉ ยฑ 5% resistors.
โ€ข Pull-down all unused Receive
Control signals to GND
using 10
Kฮฉ
resistors.
RMII Mode
โ€ข Interconnect each Port Receive
Control (GBEn_RxCTL) to the
corresponding Port Receive Data
Valid (CRS_DV) of the RMII PHY
Device
โ€ข Pull up GBE Port 0 Receive Control
signal to EP80579 3.3V Standby
Voltage (VCCGBEPSUS)
using a
1.2Kฮฉ ยฑ 5% resistor.
โ€ข Pull up GBE Port 1&2 Receive
Control signals to GBE 3.3V
using a
1.2Kฮฉ ยฑ 5% resistors
โ€ข Pull-down all unused Receive
Control signals to GND
using 10 Kฮฉ
resistors.t
Note:
โ€ข Pull-down all Receive Control signals to GND
using 10 Kฮฉ resistors when the port is not
used in either mode
GBE_REFCLK
I
RGMII Mode
โ€ข 125 MHz Reference clock
โ€ข Sourced from an external clock
or from the RGMII PHY Device.
RMII Mode
โ€ข 50 MHz Reference clock.
โ€ข External clock to both the MAC and
RMII PHY Device
Note:
โ€ข Connect to 125 MHz clock source when the ports are not used in either mode.
โ€ขSee Section 2.3
Table 100. Schematic Checklist (Sheet 19 of 26)
Checklist Items
I/O Type
(Default)
Recommendations Comments

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Intel EP80579 Specifications

General IconGeneral
BrandIntel
ModelEP80579
CategoryComputer Hardware
LanguageEnglish

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