EasyManuals Logo

Intel EP80579 Guide

Intel EP80579
347 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #303 background imageLoading...
Page #303 background image
Intel
ยฎ
EP80579 Integrated Processor Product Lineโ€”Schematics Checklist
Intel
ยฎ
EP80579 Integrated Processor Product Line
Platform Design Guide May 2010
303 Order Number: 320068-005US
GBE_REFCLK_RMII
I
RGMII Mode
โ€ข Not used in this mode
โ€ข Connect through a 100ฮฉ ยฑ1%
resistor to Ground.
RMII Mode
โ€ข 50 MHz RMII Reference clock.
โ€ข Sourced from the same external
clock as GBE_REFCLK
Note:
โ€ข In RMII Mode, the GBE_REFCLK,
GBE_REFCLK_RMII, and
PHY_REFCLK are sourced by the
same external 50 MHz clock, hence,
use a no-delay clock buffer to
distribute the clocks to the three
receivers.
โ€ข Route clock signals exactly same
length from clock buffer to
receivers.
Note:
โ€ข Pull-down RMII Reference CLock (RMII) signal to GND
using 100ฮฉ resistor when the port
is not used in either mode.
โ€ขSee Section 2.3
GBE_RCOMPP I/O โ€ข Connect through a 50ฮฉ ยฑ1% resistor to Ground.
GBE_RCOMPN I/O
โ€ข Pull up to EP80579 GbE 2.5V Standby (VCCSUS25) supply through a 50ฮฉ
ยฑ1% resistor
MDC O
โ€ข Connect to the MDC signal of the PHY device.
โ€ข Provide termination if signal is connected to multiple receivers.
โ€ข Resides in GbE Standby Power Well
Note:
โ€ข Can be left as NC when none of GBE ports is connected to an interfacing
device
MDIO I/O
โ€ข Connect to the MDIO signal of the PHY device.
โ€ข Pull-up signal to EP80579 GbE 2.5V Standby (VCCSUS25) using a 1.5 Kฮฉ
ยฑ 5%
resistor
Note:
โ€ข Must be pulled high through a 10 Kฮฉ resistor to EP80579 GbE 2.5V
Standby (VCCSUS25) when none of GBE ports is connected to an
interfacing device
EEDO I
โ€ข Connect to EEPROM Serial Data Output signal (DO)
โ€ข Pull-up to corresponding GbE Standby power supply through a 4.7Kฮฉ ยฑ5%
resistor.
Note:
โ€ข Must be pulled high through a 10 Kฮฉ resistor to EP80579 GbE 2.5V
Standby (VCCSUS25) when none of GBE ports is connected to an
interfacing device
EEDI O
โ€ข Connect to EEPROM Serial Data Input signal (DI)
โ€ข
Requires a 20Kฮฉ pull-up to GbE Standby power if GbE Standby power is generated
on the platform; otherwise pull-down with 4.7
Kฮฉ
EECS O
โ€ข Connect to EEPROM Chip Select input (CS)
โ€ข Connect through a 4.7Kฮฉ ยฑ5% resistor to Ground.
Note:
โ€ข Can be left as NC when none of GBE ports is connected to an interfacing
device
Table 100. Schematic Checklist (Sheet 20 of 26)
Checklist Items
I/O Type
(Default)
Recommendations Comments

Table of Contents

Other manuals for Intel EP80579

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Intel EP80579 and is the answer not in the manual?

Intel EP80579 Specifications

General IconGeneral
BrandIntel
ModelEP80579
CategoryComputer Hardware
LanguageEnglish

Related product manuals