EasyManuals Logo

Intel EP80579 Guide

Intel EP80579
347 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #307 background imageLoading...
Page #307 background image
Intel
ยฎ
EP80579 Integrated Processor Product Lineโ€”Schematics Checklist
Intel
ยฎ
EP80579 Integrated Processor Product Line
Platform Design Guide May 2010
307 Order Number: 320068-005US
EX_RDY[3:0]# I
โ€ข HPI Interface ready signals
โ€ข Pull-up to Platform 3.3V (VCC3)
supply through a 10 Kฮฉ ยฑ5%
resistor
โ€ข These signals are used to halt
accesses using expansion bus chip
selects 7 through 4 when the chip
selects are configured to operate in
HPI mode.
โ€ข There is one EX_RDY# signal per
chip select.
โ€ข The signals only affects accesses
that use EX_CS[7:4]#
Note:
โ€ข Must be pulled high through a 10
Kฮฉ resistor when the interface is not
used or connected to an interfacing
device
EX_BURST I
โ€ข Expansion bus burst transfer
operation
โ€ข For inbound transfers, this signal is
used to signify that a burst
operation is being requested
Note:
โ€ข Must be pulled high through a 10
Kฮฉ resistor when the interface is not
used or connected to an interfacing
device
EX_RCOMPP I/O
โ€ข Connect through a 50ฮฉ ยฑ1%
resistor to Ground.
Resistive compensation (Positive)
EX_RCOMPN I/O
โ€ข Pull up to EP80579 3.3V
(VCC33) supply through a 50ฮฉ
ยฑ1% resistor
Resistive compensation (Negative)
Synchronous Serial Port (SSP) Interface
SSP_SCLK,
SSP_SFRM,
SSP_TXD,
SSP_RXD,
SSP_EXTCLK
I/O
Synchronous Serial Port Interface
signals
โ€ข Connect appropriately to the
HSS or TDM (Mezzanine) port
connectors.
โ€ข Used for HSS (TDM) port
configuration
Note:
IF the port is not used, the interface
signals should be terminated as follows
โ€ขSSP_RXD and SSP_EXTCLK must
each be pulled high through a 10
Kฮฉ resistor.
โ€ข SSP_SCLK, SSP_TXD, SSP_SFRM
can be left as no connect (NC)
IEEE 1588 Hardware-Assist Interface
1588_TX_SNAP,
1588_RX_SNAP,
1588_PPS,
1588_TESTMODE_DATA,
ASMSSIG,
AMMSSIG
I/O
โ€ข Connect appropriately 1588
Hardware Assist signals from/to
EP80579 and connector or
header.
Note:
IF the port is not used, the interface
signals should be terminated as follows
โ€ข ASMSSIG and AMMSSIGG must
each be pulled down through a 10
Kฮฉ resistor.
โ€ข 1588_TX_SNAP, 1588_RX_SNAP,
1588_PPS, and
1588_TESTMODE_DATA can be left
as no connect (NC)
Miscellaneous I/O Interface
JTAG
Note: See the application debug port design guide for information.
TCK
Pull-down to ground through a 51ฮฉ
ยฑ5% resistor
TDI
Pull-up to Platform 1.2V (V1P2)
supply through a 51ฮฉ ยฑ5% resistor
Table 100. Schematic Checklist (Sheet 24 of 26)
Checklist Items
I/O Type
(Default)
Recommendations Comments

Table of Contents

Other manuals for Intel EP80579

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Intel EP80579 and is the answer not in the manual?

Intel EP80579 Specifications

General IconGeneral
BrandIntel
ModelEP80579
CategoryComputer Hardware
LanguageEnglish

Related product manuals