Broadcom NetXtreme/NetLink BCM5718 Series

Table of ContentsBCM5718 Programmer’s Guide
Broadcom
®
January 29, 2016 • 5718-PG108-R Page 12
Table of Contents
About This Document ................................................................................................................................44
Purpose and Audience.......................................................................................................................... 44
Acronyms and Abbreviations................................................................................................................. 44
Document Conventions ......................................................................................................................... 44
References............................................................................................................................................ 45
Technical Support...................................................................................................................................... 46
Section 1: Introduction .....................................................................................................47
Product Features........................................................................................................................................ 47
Revision Levels .......................................................................................................................................... 49
Programming the Ethernet Controllers.................................................................................................... 50
Section 2: Hardware Architecture.................................................................................... 51
Theory of Operation................................................................................................................................... 51
Overview of Features ................................................................................................................................. 52
Receive Data Path ...................................................................................................................................... 54
RX Engine ............................................................................................................................................. 54
RX FIFO ................................................................................................................................................ 54
Rules Checker....................................................................................................................................... 55
RX List Initiator ...................................................................................................................................... 55
Transmit Data Path..................................................................................................................................... 56
TX MAC................................................................................................................................................. 56
TX FIFO................................................................................................................................................. 56
DMA Read.................................................................................................................................................... 57
Read Engine.......................................................................................................................................... 57
Read FIFO............................................................................................................................................. 57
Buffer Manager...................................................................................................................................... 58
DMA Write ................................................................................................................................................... 58
Write Engine.......................................................................................................................................... 58
Write FIFO............................................................................................................................................. 58
Buffer Manager...................................................................................................................................... 59
LED Control................................................................................................................................................. 59
Memory Arbiter........................................................................................................................................... 59
Host Coalescing ......................................................................................................................................... 60
Host Coalescing Engine........................................................................................................................ 60
MSI FIFO............................................................................................................................................... 61
Status Block .......................................................................................................................................... 61
10BT/100BTx/1000BASE-T Transceiver ................................................................................................... 62