Endian Control (Byte and Word Swapping)BCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 193
Endian Control (Byte and Word Swapping)
Background
There are two basic formats for storing data in memory—little-endian and big-endian. The endianess of a
system is determined by how multibyte quantities are stored in memory. A big-endian architecture stores the
most significant byte at the lowest address offset while little-endian architecture stores the least significant byte
at the lowest address offset.
For example, the 32-bit hex value 0x12345678 would be stored in memory as shown in the following table.
Another method of viewing how this data would be stored is shown in the following tables.
Examples of big-endian platforms include SGI Irix, IBM RS6000, and SUN.
Examples of little-endian platforms include Intel x86 and DEC Alpha.
PCI assumes a little-endian memory model. PCI configuration registers are organized so that the least
significant portion of the data is assigned to the lower address.
Note: Setting register 0x68 bit 2 (Enable Endian Byte Swap) causes PCI configuration reads to the
following registers to become swapped:
•0x40
• 0x68 – 0x9C
• 0xF4 – 0xFF
This is different behavior from previous NetXtreme controllers. Reference BCM5718 Family errata
relating to byte swap control for additional information.
Table 51: Endian Example
Address 00 01 02 03
Big Endian 12 34 56 78
Little Endian 78 56 34 12
Table 52: Storage of Big-Endian Data
Storage Byte 00 01 02 03
Data Contents 12 34 56 78
Table 53: Storage of Little-Endian Data
Storage Byte 03 02 01 00
Data Contents 12 34 56 78
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