Ethernet MAC (EMAC) RegistersBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 321
Transmit MAC Status Register (offset: 0x460)
Transmit MAC Lengths Register (offset: 0x464)
Enable Flow Control 4 RW 0 MAC will send 802.3x flow control frames.
Reserved 3:2 RO 0 –
Enable TCE 1 RW 1 Used to be enable TDE in legacy–same purpose.
Reset 0 RW 0 When this bit is set to 1, the Transmit MAC state
machine will be reset.
This is a self-clearing bit.
Name Bits Access
Default
Value
Description
Reserved 31:6 RO 0 –
Consumer Index 22:11 RO UUUU The Consumer Index of the erring packet is
reported by this field.
ODI Overrun 5 W2C 0 Output data interface has overrun.
ODI Underrun 4 W2C 0 Output data interface has underrun.
Link Up 3 RO 0 Link is up, if set.
Sent XON 2 W2C 0 An XON flow control frame was sent.
Sent XOFF 1 W2C 0 An XOFF flow control frame was sent.
RX Currently XOFFed 0 RO 0 Received stopped due to flow control.
Name Bits Access
Default
Value
Description
HTX2B Count Down Value 31:24 RW 0x1 HT2XB Count Down Value
HTX2B Jumbo Frame Length 23:16 RW 0x0 This value + 1500 is used by hardware as the
maximum standard frame length for HTX2B. A
frame with a length larger than that is a jumbo
frame for HTX2B.
The length is the effective length of a composed
L2 frame as seen from the wire, including the L2
header, L2 payload, and the FCS (CRC) field.
Reserved 15:14 RO 0
IPG CRS Length 13:12 RW 0 When multiplied by 2, this field indicates the
number of bytes from the end of the interpacket
gap (IPG) during which incoming carrier is
ignored.
IPG Length 11:8 RW 0 When multiplied by 2, this field indicates the
number of bytes in the entire IPG.
Slot Time Length 7:0 RW 0 When multiplied by 2, this field indicates the
number of bytes in the slot time.
Name Bits Access
Default
Value
Description
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