Non-Volatile Memory (NVM) Interface RegistersBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 490
NVM Config 2 Register (offset: 0x7018)
This register is reset by POR only.
Status 6:4 RW 0 if flash_
mode.
7 if buffer_
mode.
X other-wise
This field represents the bit offset in the status
command response to interpret as the ready flag.
Reserved–Bitbang
mode
3RO0 –
Reserved–Pass mode 2 RO 0 –
Buffer mode 1 RW Pin Enable SSRAM Buffered Interface mode.
Flash mode 0 RW Pin Enable Flash Interface mode.
Name Bits Access Default Value Description
Reserved 31:24 RO 0 –
Status Command 23:16 RW 0x05 if pin strap = ST
0xD7 if pin strap =
Atmel
This is the Flash status register read command.
Dummy 15:8 RW X –
Erase Command 7:0 RW 0x81 if pin strap =
Atmel
0xDB if pin strap =
STMxx
This is the Flash page erase command.
Note: ST25xx does not support page erase,
therefore the corresponding command is for
sector erase.
Name Bits Access Default Value Description