Broadcom NetXtreme/NetLink BCM5718 Series - PCI Classcode and Revision ID Register (Offset: 0 X08); BIST, Header Type, Latency Timer, Cache Line Size Register (Offset: 0 X0 C)

PCI Configuration RegistersBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 273
PCI Classcode and Revision ID Register (offset: 0x08)
This register is reset by Hard Reset.
BIST, Header Type, Latency Timer, Cache Line Size Register (offset:
0x0C)
Name Bits Access
Default
Value
Description
PCI Classcode 31:8 RO 0x020000 Default for (LAN Function 0): 0x020000
Revision ID—All-
layer Revision ID
7:4 RO ASIC Rev
Input
This field will be updated automatically by hardware
based on the External All Layer Revision ID. For
example, this field will contain a value of 0x0 after hard
reset for BCM5718 A0 silicon. Software shall use this
field only to display the Device Silicon Revision ID for
application where the user/customer needs to know the
Device Silicon Revision ID. One such application is the
B57DIAG Device Banner. Furthermore, Software (Boot
Code/Driver/B57DIAG) shall NOT use this field in
determining Bug Fixes. It should only use the Internal
Revision ID, bits 31:24 and bits 19:16 from Register 68,
for that purpose.
•0x0 for A steps
•0x1 for B steps
• 0x2 for C steps
Revision ID —
Metal Revision ID
3:0 FW-RW
Host-RO
ASIC Rev
Input
This field will be updated automatically by hardware
based on the Metal Revision ID.
• 0x0 for metal 0 step
• 0x1 for metal 1 step
• 0x2 for metal 2 step
Name Bits Access
Default
Value
Description
BIST 31:24 RO 0x0 The 8-bit BIST register is used to initiate and report the
results of any Built-In-Self-Test. This value can be
written by firmware through the PCI register space BIST
register to modify the read value to the host.
Header Type 23:16 RO 0x80 The 8-bit Header Type register identifies both the layout
of bytes 10h through 3Fh of the Configuration space, as
well as whether this adapter contains multiple functions.
A value of 0x80 indicates a multifunction device (Type
0) using the format specified in the PCI specification,
while a value of 0x0 indicates a single function Type 0
device.
Latency Timer 15:8 RO 0x0 This register does not apply to PCI express and must
be hardwired to zero
Cache Line Size 7:0 RO 0x0 This field is implemented by PCIE device as a read/
write field for legacy compatibility purposes.