PCI Configuration RegistersBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 271
PCI Configuration Registers
Device ID and Vendor ID Register (offset: 0x00)
This register is reset by hard Reset.
Status and Command Register (offset: 0x04)
This register is reset by PCIE Reset.
Name Bits Access Default Value Description
Device ID 31:16 RO – Default for BCM5717 (LAN Function 0): 0x1655
Default for BCM5718 (LAN Function 0): 0x1656
Vendor ID 15:0 RO 0x14E4 –
Name Bits Access
Default
Value
Description
Detected Parity
Error
31 RW2C 0x0 When this bit is set, it indicates that the function has
received a poisoned TLP
Signaled System
Error
30 RW2C 0x0 This bit is set when a function sends an ERR_FATAL or
ERR_NONFATAL message and the SERR enable bit in
the command register is set
Received Master
Abort
29 RW2C 0x0 This bit is set when a requester receives a completion with
UR completion status
Received Target
Abort
28 RW2C 0x0 This bit is set when a requester receives a completion with
completer abort completion status.
Signaled Target
Abort
27 RW2C 0x0 This bit is set when a function acting as a completer
terminates a request by issuing Completer abort
completion status to the requester
DEVSEL Timing 26:25 RO 0x0 Does not apply to PCIE
Master Data Parity
Error
24 RW2C 0x0 The master data parity error bit is set by a requester if the
parity error enable bit is set in its command register and
either of the following 2 conditions occur. If the requester
receives a poisoned completion if the requester poisons a
write request If the parity Error enable bit is cleared, the
master data parity error status bit is never set
Fast Back-to-back
capable
23 RO 0x0 Does not apply to PCIE.
Reserved 22 RO 0x0 These bits are reserved and tied low per the PCI
specification.
66 MHz Capable 21 RO 0x0 Does not apply to PCIE
Capabilities List 20 RO 0x1 This bit is tied high to indicate that the device supports a
capability list. The list starts at address 0x40.
Interrupt Status 19 RO 0x0 Indicates this device generated an interrupt
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