Broadcom NetXtreme/NetLink BCM5718 Series User Manual

Write DMA RegistersBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 450
Write DMA Status Register (offset: 0x4C04)
Write DMA PCI FIFO Overrun
Attention Enable
6 RW 0 Enable Write DMA PCI FIFO Overrun Attention.
Write DMA PCI Host Address
Overflow Error Attention
Enable
5 RW 0 Enable Write DMA PCI Host Address Overflow
Error Attention.
Write DMA PCI Parity Error
Attention Enable
4 RW 0 Enable Write DMA PCI Parity Error Attention.
Write DMA PCI Master Abort
Attention Enable
3 RW 0 Enable Write DMA PCI Master Abort Attention.
Write DMA PCI Target Abort
Attention Enable
2 RW 0 Enable Write DMA PCI Target Abort Attention.
Enable 1 RW 1 This bit controls whether the Write DMA state
machine is active or not. When set to 0, it
completes the current operation and cleanly
halts. Until it is completely halted, it remains 1
when read.
Reset 0 RW 0 When this bit is set to 1, the Write DMA state
machine is reset. This is a self-clearing bit.
Name Bits Access
Default
Value
Description
Reserved 31:10 RO 0 –
Write DMA Local Memory
Read Longer than DMA Length
Error
9 W2C 0 Write DMA Local Memory Read Longer Than
DMA Length Error.
Write DMA PCI FIFO Overwrite
Error
8 W2C 0 Write DMA PCI FIFO Overwrite Error (PCI write
longer than DMA length).
Write DMA PCI FIFO Underrun
Error
7 W2C 0 Write DMA PCI FIFO Underrun Error.
Write DMA PCI FIFO Overrun
Error
6 W2C 0 Write DMA PCI FIFO Overrun Error.
Write DMA PCI Host Address
Overflow Error
5 W2C 0 Write DMA PCI Host Address Overflow Error.
Write DMA PCI Parity Error 4 W2C 0 Write DMA PCI Parity Error.
Write DMA PCI Master Abort
Error
3 W2C 0 Write DMA PCI Master Abort Error.
Write DMA PCI Target Abort
Error
2 W2C 0 Write DMA PCI Target Abort Error.
Reserved 1:0 RO 0 –
Name Bits Access
Default
Value
Description

Broadcom NetXtreme/NetLink BCM5718 Series Specifications

General

Brand	Broadcom
Model	NetXtreme/NetLink BCM5718 Series
Category	Controller
Language	English