Host Coalescing Control RegistersBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 421
HC Parameter Set Reset Register (Offset: 0x3C28)
Place this in HC block.
Status Block Host Address Register (offset: 0x3C38)
This 64-bit register is in host address format and tells the NIC where to DMA the status block.
When IOV is enabled:
Status Block 0 Host Address Register (offset: 0x3C38)
Status Block 1 Host Address Register (offset: 0x3D00)
Status Block 2 Host Address Register (offset: 0x3D08)
Status Block 3 Host Address Register (offset: 0x3D10)
Status Block 4 Host Address Register (offset: 0x3D18)
Status Block 5 Host Address Register (offset: 0x3D20)
Status Block 6 Host Address Register (offset: 0x3D28)
Status Block 7 Host Address Register (offset: 0x3D30)
Status Block 8 Host Address Register (offset: 0x3D38)
Status Block 9 Host Address Register (offset: 0x3D40)
Status Block 10 Host Address Register (offset: 0x3D48)
Status Block 11 Host Address Register (offset: 0x3D50)
Status Block 12 Host Address Register (offset: 0x3D58)
Status Block 13 Host Address Register (offset: 0x3D60)
Status Block 14 Host Address Register (offset: 0x3D68)
Status Block 15 Host Address Register (offset: 0x3D70)
Table 107: HC Parameter Set Reset Register (Offset: 0x3C28)
Name Bits Access
Default
Value
Description
Legacy 31:17 RU 0x0 Unused
HC Parameter Set Reset
Bit-Map
16:0 RW 0x0 Write a 1 to the position of this bit map to clear the
respective HC Parameter Register Set – the
associated internal HC states are also cleared by
this action.
This is useful for VRQ Flush-Synch purposes
while in IOV Mode.
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