SerDes PHY Register DefinitionsBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 561
1000XSTATUS3
Register Description: 1000X Status3 Register.
Register Offset: 0x16 at Block 0
Table 138: 1000XSTATUS2
Bits Name RW Description Default
15 SGMII_MODE_CHG RO 1 = SGMII mode has changed since last read (SGMII mode
enabled or disabled).
Note: This bit is useful when the auto-detection is enabled
in register 0*10h bit [4].
0 = SGMII mode has not changed since last read (fixed in
SGMII or fiber mode).
0
14 CONSISTENCY_MISM
ATCH
RO 1 = Consistency mismatch detected since last read.
0 = Consistency mismatch has not been detected since last
read.
0
13 AUTONEG_RES_ERR RO 1 = Auto-negotiation HCD error detected since last read
(HCD is none in fiber mode).
0 = Auto-negotiation HCD error has not been detected
since last read.
0
12 SGMII_SELECTOR_MI
SMATCH
RO 1 = SGMII selector mismatch detected since last read
(auto-negotiation page received from link partner with bit [0]
= 0 while local device is in SGMII mode).
0 = SGMII selector mismatch not detected since last read.
0
11 SYNC_STATUS_FAIL RO 1 = Sync_status has failed since last read (synchronization
has been lost).
0 = Sync_status has not failed since last read.
0
10 SYNC_STATUS_OK RO 1 = Sync_status ok detected since last read
(synchronization has been achieved).
0 = Sync_status ok has not been detected since last read.
0
9:7 RESERVED RO Reserved. 0
6 LINK_DOWN_SYNC_L
OSS
RO 1 = Valid link went down due to a loss of synchronization for
over 10 ms.
0 = Failure condition has not been detected since last read.
0
5:1 RESERVED RO Reserved. 0
0 ANEG_ENABLE_STAT
E
RO 1 = An_enable state in auto-negotiation fsm entered since
last read.
0 = An_enable state has not been entered since last read.
0
Table 139: 1000XSTATUS3
Bits Name RW Description Default
15:11 RESERVED RO Reserved 0x00
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