Ethernet MAC (EMAC) RegistersBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 324
Receive MAC Status Register (offset: 0x46C)
MAC Hash Register 0 (offset: 0x470)
MAC Hash Register 1 (offset: 0x474)
MAC Hash Register 2 (offset: 0x478)
MAC Hash Register 3 (offset: 0x47C)
Name Bits Access
Default
Value
Description
Reserved 31:4 RO 0 –
RX FIFO Overrun 3 W2C 0 RX FIFO has encountered an overrun condition.
XON received 2 W2C 0 MAC control frame with the PAUSE opcode was
received with PAUSE TIME field set to zero.
The bit is sticky and must be written to clear.
XOFF received 1 W2C 0 MAC control frame with the PAUSE opcode was
received with PAUSE TIME field set to nonzero.
The bit is sticky and must be written to clear.
Remote Transmitter XOFFed 0 RO 0 A previously received XOFF timer has not
expired yet.
Name Bits Access
Default
Value
Description
Hash value 31:0 RW 0 Hash value for multicast destination address
matching.
Name Bits Access
Default
Value
Description
Hash value 31:0 RW 0 Hash value for multicast destination address
matching.
Name Bits Access
Default
Value
Description
Hash value 31:0 RW 0 Hash value for multicast destination address
matching.
Name Bits Access
Default
Value
Description
Hash value 31:0 RW 0 Hash value for multicast destination address
matching.