Status BlockBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 86
• Bit [0]: Update bit
• Bit [31:1]: Reserved 0x0
Status Block and INT MailBox Addresses
Each status block may be placed in an independent host memory address (64-bit). Each vector may be
acknowledged via associated INT MailBoxes.
The Status word field contains bit flags that contain error information about the status of the controller. The
defined flags are listed in Table 19.
Table 18: Status Block Host Addresses and INT MailBox Addresses
Status
Block #
Status Block Host
Address Register
(64-Bit)
RSS Mode
Comments
INT MailBox
Register
Address
Indication
Items
Legacy 0x3C3C, 0x3C38 0x200 All Legacy status block
Used by INTx or MSI
0 x3C3C, 0x3C38 0x200 Link-Status change
Error/Attention
SBD Ring 1 Cons Index
Std RBD Cons Index
Jmb RBD Cons Index
Used in all MSI-X modes for
Vector#0
1 0x3D00, 0x3D04 0x208 Rx Return Ring 0
Prod Index
Used only in MSI-X multivector
RSS mode or multivector EAV
mode for Vector#1 –Vector#4
2 0x3D08, 0x3D0C 0x210 Rx Return Ring 1
Prod Index
3 0x3D10, 0x3D14 0x218 Rx Return Ring 2
Prod Index
4 0x3D18, 0x3D1C 0x220 Rx Return Ring 3
Prod Index
5 0x3D20, 0x3D24 N/A N/A Used only in MSI-X multivector
EAV mode for Vector#5
Table 19: Status Word Flags
Bits Name Description
0 Updated This bit is always set to 1 each time the status block is updated in the host via
DMA. It is expected that host software clear this bit in the status block each time
it examines the status block. This provides the host driver with a mechanism to
determine whether the status block has been updated since the last time the
driver looked at the status block.
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