Broadcom NetXtreme/NetLink BCM5718 Series

PCI Configuration RegistersBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 303
Uncorrectable Error Severity Register (offset: 0x10C)
This register is reset by Hard Reset.
Name Bits Access
Default
Value
Description
Reserved 31:21 RO 0 –
Unsupported Request Error
Severity
20 RWS 0 This bit controls the severity
0 = nonfatal
1 = fatal
ECRC Error Severity 19 RWS 0 This bit controls the severity
0 = nonfatal
1 = fatal
Malformed TLP Severity 18 RWS 1 This bit controls the severity
0 = nonfatal
1 = fatal
Receiver Overflow Error
Severity
17 RWS 1 This bit controls the severity
0 = nonfatal
1 = fatal
Unexpected completion Error
Severity
16 RWS 0 This bit controls the severity
0 = nonfatal
1 = fatal
Completer Abort Error
Severity
15 RWS 0 This bit controls the severity
0 = nonfatal
1 = fatal
Completion Timeout Error
Severity
14 RWS 0 This bit controls the severity
0 = nonfatal
1 = fatal
Flow control Protocol Error
Severity
13 RWS 1 This bit controls the severity
0 = nonfatal
1 = fatal
Poisoned TLP Severity 12 RWS 0 This bit controls the severity
0 = nonfatal
1 = fatal
Reserved 11:4 RO 0 –
Surprise down error severity 5 RO 1 Pcie 1.1 spec page 409
Data Link Protocol Error
Severity
4 RWS 1 This bit controls the severity
0 = nonfatal
1 = fatal
Reserved 3:1 RO 0 –
Training Error Severity 0 RWS 1 This bit controls the severity
0 = nonfatal
1 = fatal