Central Power Management Unit (CPMU) RegistersBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 397
Mutex Request Register (offset: 0x365C)
This register is reset by POR Reset or CPMU Register Software Reset.
Mutex Grant Register (offset: 0x3660)
This register is reset by POR Reset or CPMU Register Software Reset.
GPHY Strap Register (offset: 0x3664)
This register is reset by POR Reset or CPMU Register Software Reset.
Name Bits Access
Default
Value
Description
Reserved 31:16 DC 0 –
Set Request/Request Pending 15:0 RW1S 0x0 Writing a 1 to any of these bits pends a Mutex
lock request on behalf of a software agent. The
bit is subsequently latched by hardware and shall
read 1 as long as the request is pending. Writing
a 0 to a bit shall have no effect.
Reading this field may return zero or more bits
with value 1. Each bit with value 1 indicates a
pending request.
Name Bits Access
Default
Value
Description
Reserved 31:16 DC 0 –
Set Request/Request Pending 15:0 RW1S 0x0 Reading this field shall return a maximum of one
set bit at any time. The set bit shall point to the
lock owner. If the Mutex is not locked, then a read
shall return a value 0x0000.
Writing a 1 to the already set bit shall relinquish
the lock and the set bit shall be cleared.
Writing a 1 to an unset bit shall cancel the
corresponding pending request if there was one,
and the pairing bit in the Mutex_Request_Reg
shall be cleared.
Writing a 0 to any bits has no effect.
Name Bits Access
Default
Value
Description
Reserved 31:6 DC 0x0 Readable and writeable reserved bits.
APE CM3 Big Endian Enable 8 RW 0x0 Enable APE CM3 Big Endian Setting.
Reserved 7:6 DC 0x0 Readable and writeable reserved bits.
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