Broadcom NetXtreme/NetLink BCM5718 Series User Manual

Host Coalescing Control RegistersBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 419
Receive Max Coalesced BD Count During Interrupt Register (offset:
0x3C18)
This register has the same attribute that of 0x3C10 except that this parameter is active only during the During
Interrupt state – which is the state during which the ISR has acknowledged an interrupt by writing a non-zero
value to the MailBox register and thus the interrupt is in a masked state. If this parameter triggers (while in During
Interrupt state), the chip will DMA the latest Status Block to the host memory, but the interrupt will remain
deasserted.
When IOV is enabled:
Receive Max Coalesced BD Count During Interrupt Register for VRQ 0 => 0x3C18
Receive Max Coalesced BD Count During Interrupt Register for VRQ 1 => 0x3D90
Receive Max Coalesced BD Count During Interrupt Register for VRQ 2 => 0x3DA8
Receive Max Coalesced BD Count During Interrupt Register for VRQ 3 => 0x3DC0
Receive Max Coalesced BD Count During Interrupt Register for VRQ 4 => 0x3DD8
Receive Max Coalesced BD Count During Interrupt Register for VRQ 5 => 0x3DF0
Receive Max Coalesced BD Count During Interrupt Register for VRQ 6 => 0x3E08
Receive Max Coalesced BD Count During Interrupt Register for VRQ 7 => 0x3E20
Receive Max Coalesced BD Count During Interrupt Register for VRQ 8 => 0x3E38
Receive Max Coalesced BD Count During Interrupt Register for VRQ 9 => 0x3E50
Receive Max Coalesced BD Count During Interrupt Register for VRQ 10 => 0x3E68
Receive Max Coalesced BD Count During Interrupt Register for VRQ 11 => 0x3E80
Receive Max Coalesced BD Count During Interrupt Register for VRQ 12 => 0x3E98
Receive Max Coalesced BD Count During Interrupt Register for VRQ 13 => 0x3EB0
Receive Max Coalesced BD Count During Interrupt Register for VRQ 14 => 0x3EC8
Receive Max Coalesced BD Count During Interrupt Register for VRQ 15 => 0x3EE0
Receive Max Coalesced BD Count During Interrupt Register for VRQ 16 => 0x3EF8
Send Max Coalesced BD Count During Interrupt Register (offset:
0x3C1C)
This register has the same attribute that of 0x3C14 except that this parameter is active only during the During
Interrupt state – which is the state during which the ISR has acknowledged an interrupt by writing a non-zero
value to the MailBox register and thus the interrupt is in a masked state. If this parameter triggers (while in During
Interrupt state), the chip will DMA the latest Status Block to the host memory, but the interrupt will remain
deasserted.

Broadcom NetXtreme/NetLink BCM5718 Series Specifications

General

Brand	Broadcom
Model	NetXtreme/NetLink BCM5718 Series
Category	Controller
Language	English