Packet FilteringBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 136
Ethernet CRC Calculation
The Ethernet controller uses the standard 32-bit CRC required by the Ethernet specification as its FCS in all
packets. The checksum is the 32-bit remainder of the polynomial division of the data taken as a bit stream of
polynomial coefficients and a predefined constant, which also represents binary polynomial coefficients. The
checksum is optionally appended most-significant bit first to a packet, which is to be sent down the wire. At the
receiving side, the division is repeated on the entire packet including the CRC checksum. The remainder is
compared to a known constant. For details on the mathematical basis for CRC checksums, see Tanenbaum's
Computer Networks, Third Edition, c1996.
The 32-bit CRC polynomial divisor is shown below:
x32 + x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x + 1
Generating CRC
The following steps describe a method to calculate the CRC with the resulting 32-bit quantity having reversed
bit order (i.e., most significant bit x31 of the remainder is right-most bit). The data should be treated as a stream
of bytes. Set remainder to 0xFFFFFFFF. For each bit of data starting with least-significant bit of each byte:
1. If right-most bit (bit-0) of the current remainder XORed with the data bit equal 1,
then remainder = (remainder shifted right one bit) XOR 0xEDB88320,
else remainder = (remainder shifted right one bit).
2. Invert remainder such that remainder = ~remainder.
Remainder is CRC checksum.
Right-most byte is the most significant and is to be sent first.
Swap bytes of CRC if big-endian byte ordering is desired.
Checking CRC
The following steps describe a method to check a stream of bytes, which has a CRC appended.
1. Set remainder to 0xFFFFFFFF.
2. For each bit of data starting with least-significant bit of each byte:
If right-most bit (bit-0) of the current remainder XORed with the data bit equal 1,
then remainder = (remainder shifted right one bit) XOR 0xEDB88320,
else remainder = (remainder shifted right one bit).
3. Remainder should equal magic value 0xDEBB20E3 if CRC is correct.
Initializing the MAC Hash Registers
The 128-bit multicast hash table is treated as a single object occupying four Ethernet controller registers starting
at offset 0x0470 (see Table 37 on page 137). The 128-bit value follows the big-endian ordering required by
Ethernet controller. Thus, the most significant 32-bit of the 128-bit value resides in Mac_Hash_Register_0 at
offset 0x0470 and the least significant 32-bit resides in Mac_Hash_Register_3 at offset 0x047c.
Host software can enable the reception of all multicast frames including broadcast frames by setting all four
multicast hash registers to 0xFFFFFFFF.
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