SerDes PHY Register DefinitionsBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 570
GE_PRBS_CONTROL
Register Description: PRBS Control Register. This is to use in PRBS test mode only.
Register Offset: 0x18 (Block 0)
GE_PRBS_STATUS
Register Description: PRBS Status Register. This is to use in PRBS test mode only.
Register Offset: 0x19 (Block 0)
Bit Number
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved prbs_order inv_pr
bs_or
der
prbs_
en
Table 150: GE_prbs_status
Bit Name RW Description Default
15:4 Reserved RO Reserved 0x0
3:2 Prbs_order RW 0 = 7th order
1 = 15th order
2 = 23rd order
3 = 31st order
0
1
Inv_prbs_order RW Set to invert the polynomial order 0
0
Prbs_en RW Set to enable PRBS testing 0
Bit Number
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved Unloc
k
Lock Prbs_errors
Table 151: GE_prbs_status
Bit Name RW Description Default
15:13 Reserved RO Reserved 0x0
12 Unlock RO In PRBS mode, this bit indicates signal is no longer
available or PRBS pattern is loss.
0
11 Lock RO In PRBS mode, this indicates PRBS pattern is locked. 0
10:0 Prbs_errors RO In PRBS mode, this indicates number of errors detected. 0x0000
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