Buffer Manager RegistersBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 429
Buffer Manager Status Register (offset: 0x4404)
MBUF Pool Base Address Register (offset: 0x4408)
The MBUF Pool Base Address specifies the beginning of the MBUF.
BM Test mode 3 RW 0 Buffer Manager Test mode. Must be set to 0 for
normal operation.
Attention Enable 2 RW 0 When this bit is set to 1, an internal attention is
generated when an error occurs.
Enable 1 RW 1 This bit controls whether the Buffer Manager is
active or not.
When set to 0 it completes the current operation
and cleanly halts. Until it is completely halted, it
remains one when read.
Reset 0 RW 0 When this bit is set to 1, the Buffer Manager state
machine is reset. This is a self-clearing bit.
Name Bits Access
Default
Value
Description
BM Test mode 31:5 RO –
MBUF Low Attention 4 RO – MBUF Low Attention Status
Reserved 3 RO 0 –
Error 2 RO – Buffer Manager Error Status
Reserved 1:0 RO 0 –
Name Bits Access
Default
Value
Description
Reserved 31:23 RO 0 –
MBUF Base Address 22:0 RW 0xA000h Specifies beginning of the MBUF for receive
packet.
The base address will ignore the lower seven
bits, thus aligning the beginning of the MBUF
pool on a 128-byte boundary.
Name Bits Access
Default
Value
Description
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