Broadcom NetXtreme/NetLink BCM5718 Series User Manual

Central Power Management Unit (CPMU) RegistersBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 392
RAM Control Register (offset: 0x363C)
This register is reset by POR Reset or CPMU Register Software Reset.
SW controlled POR to GPHY 5 RW 0x0 This bit is allows the boot code to reset the GPHY
during an unexpected shutdown, so that it enters
100BT instead of remaining in the Gig mode to
avoid unnecessary power consumption.
(BCM5717 and BCM5718)
Reserved
4DC0x0 –
(BCM5719) Power-down 4 RW 0x0 Legacy Address: 0x6804:[20] Force CPMU into
Low Power State, LAN function will be powered
down (GPHY, PCIE, IPSEC, APE). This bit is
cleared by a rising edge of PERST_L.
(BCM5717 and BCM5718)
Reserved
3DC0x0 –
CPMU Register Software
Reset
3 RW SC 0x0 Software reset for resetting all the registers to
default.
Reserved 2 DC 0x0 –
CPMU Software Reset 2 RW 0x0 Software reset for all the CPMU logic expect for
registers.
BIAS IDDQ 1 RW 0x0 Legacy Address: 0x6804:[22]
When this bit is set, BIAS will be powered down.
GPHY IDDQ 0 RW 0x0 Legacy Address: 0x6804:[21].
When this bit is set, GPHY will be powered down.
Name Bits Access
Default
Value
Description
Core RAM Power down 31 RW 0x0 Legacy Address: 0x6804:[24]
Core RAM power down
BD RAM Power down 30 RW 0x0 Legacy Address: 0x6804:[24]
BD RAM power down
Reserved 29:0 DC 0 –
Name Bits Access
Default
Value
Description

Broadcom NetXtreme/NetLink BCM5718 Series Specifications

General

Brand	Broadcom
Model	NetXtreme/NetLink BCM5718 Series
Category	Controller
Language	English