Hardware DescriptionBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 154
Hardware Description
The following items describe the included hardware:
Clock Hardware:
• EAV Reference Clock – this clock is neither the Master-clock nor the Slave-clock, but a specific clock. All
time related hardware services are provided with respect to this clock.
• Reference Time Capture off an external GPIO Trigger
• A Time Watchdog which drives a GPIO output pin upon meeting a programmable time value
• A divided EAV Reference Clock output
Transmit Time Sync hardware:
• A 64-bit TX Time Stamp Register.
• A bit defined in Send BD for indication of TX Time capture
Receive Time Sync hardware:
• Programmable Receive Frame Cracker.
• A 64-bit RX Time Stamp Register + A 16-bit RX PTP Sequence ID Register
• An RX Time Stamp Lock Timer
Each of above items is described separately in the following sections.
Table 44: PTP Time Synchronization Messaging Roles
PTP Master Node PTP Slave Node
Host Software NIC Hardware NIC Hardware Host Software
1 TX PTP Sync packet—
mark capture →
Capture TX stamp (t1) →
2 → Receive and identify
PTP sync packet, then
capture RX Time Stamp
(t2)
→ Receive packet, Read
RX Time Stamp Reg.
3 TX PTP Sync Follow-up
packet with embedded
(t1) value →
→ (pass through) → Receive PTP Follow-
up packet
4 Collect t1, t2, and Tdelay
to compute the Slave
Offset value
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