Central Power Management Unit (CPMU) RegistersBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 376
NIC Jumbo Receive BD Producer Index Register (offset: 0x3008)
All registers reset are core reset unless specified.
NIC Standard Receive BD Producer Index Register (offset: 0x300C)
Central Power Management Unit (CPMU) Registers
CPMU Control Register (offset: 0x3600)
This register is reset by POR Reset except for Powerdown bit (bit #2)
Name Bits Access
Default
Value
Description
Reserved 31:8 RO 0 –
NIC Jumbo Receive BD
Producer Index
7:0 RW – Current Jumbo Received BD have been fetched
by RDMA module and are available for incoming
RX packets.
Name Bits Access
Default
Value
Description
Reserved 31:9 RO 0 –
NIC Standard Receive BD
Producer Index
8:0 RW – –
Name Bits Access
Default
Value
Description
Reserved 31:29 DC 0x0 –
Software controlled GPHY
Force DLL on
28 RW 0x0 When this bit is enabled, GPHY DLL will be
forced on by CPMU (unless the chip is in Low
Power mode). This bit is intended for ASF.
Enable GPHY powerdown in
D0u (this feature is not used in
BCM5718 family)
27 RW 0x0 Enable CPMU to powerdown GPHY when the
device enters D0u.
1: Enable
0: Disable.
Reserved 26:22 DC 0x0 –
Reserved 21 DC 0x1 –
Reserved 20 DC 0x0 –
SGMII/PCS Powerdown 19 RW 0x0 Setting this bit will powerdown SGMII-PCS
module.