PCI Configuration RegistersBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 296
SLOT_CAPABILITY – 0xc0
SLOT_CONTROL_STATUS – 0xc4
ROOT_CAP_CONTROL – 0xc8
This register is not applicable for EP and hardwired to 0.
ROOT_STATUS – 0xcc
This register is not applicable for EP and hardwired to 0.
ASPM_CTRL 1:0 RW 0 ASPM Control. Value used by logic is dependent
on the value of this bit for each enabled function
and also on the programmed powerstate of each
function.
Path= i_cfg_func.i_cfg_public.i_cfg_exp_cap
Name Bits Access
Default
Value
Description
PHYSICAL_SLOT_NUMBER 31:19 RO 0 Not implemented
UNUSED 18:17 RO 0 Not implemented
SLOT_POWER_LIMIT_SCAL
E
16:15 RO 0 Not implemented
SLOT_POWER_LIMIT_VALU
E
14:7 RO 0 Not implemented
UNUSED_2 6:0 RO 0 Not implemented
Name Bits Access
Default
Value
Description
SLOT_STATUS 31:23 RO 0 Not implemented
PRESENCE_DETECT 22 RO 0 Not implemented
UNUSED_1 21:16 RO 0 Not implemented
SLOT_CONTROL 15:0 RO 0 Not implemented
Name Bits Access
Default
Value
Description
Unused 31:0 RO 0 –
Name Bits Access
Default
Value
Description
Unused 31:0 RO 0 –
Name Bits Access
Default
Value
Description