10h–1Fh Register Map Detailed DescriptionBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 524
1Ch: DLL Selection Register (Shadow Register Selector = “01h”)
1Ch: Spare Control 1 Register (Shadow Register Selector = “02h”)
7:0 CABLETRON LED
REGISTER
RW [7] cabletron led select
1 = select cabletron 0= normal mode
[6] online
1 = online 0 = offline
[5] tx enable
1 = transmit enable 0 = transmit disable
[4] rx enable
1 = receive enable 0 = receive disable
[3] link enable
1 = link enable 0 = link disable
[2] led mode
1 = traffic mode 0 = normal mode
[1] bypass internal yellow and blink clocks
1 = enable external yellow and blink
clocks, via tpin0 and tpin2, respectively.
0 = use internally generated clocks
[0] spare
00000000
Bit Name RW Description Default
15 WRITE ENABLE RW 1 = write bits [9:0]
0 = read bits [9:0]
0
14:10 SHADOW REGISTER
SELECTOR
RW Shadow Register Selector 00001
9:6 RESERVED RW write as 0, ignore on read 000
5:0 HIGH QUALITY CLOCK
TEST MODE
RW xx000x = no clock
nn0010 = clk125
nn0011 = rxclk
nn01yy = rxiclk(yy), where yy = 0-3
nn1yyy = txiclk(yyy), where yyy = 0-7
1. nn = 0-3 for slice 1–4.
2. test mode selection is from slice1.
0000
Bit Name RW Description Default
15 WRITE ENABLE RW 1 = write bits [9:0]
0 = read bits [9:0]
0
Bit Name RW Description Default
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