Initialization ProcedureBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 141
17. Initialize Receive BD Standard Producer Ring Index (0x26C) to zero.
18. Initialize the Standard Ring Replenish Watermark register (offset: 0x2d00). The recommended value is 0x20.
If supporting Jumbo frames, also initialize 0x2d04 (the recommended value is 0x10). See “Jumbo Frames”
on page 116 for more information about supporting Jumbo frames.
19. Initialize the Send Ring Producer Index registers by clearing (that is, set to zero) the Send BD Ring Host
Producer index (see “Send BD Ring Host Producer Index Register (offset: 0x300–0x307)” on page 308).
20. Disable unused Receive Return Rings. Host software must write the RCB_FLAG_RING_DISABLED bit to
the flags field of the ring control blocks of all unused Receive Return Rings.
21. Initialize Receive Return Rings. The Receive Return Ring RCBs are located in the Miscellaneous Memory
region from 0x200 to 0x2FF. Host software must initialize the host physical memory address based on
allocation routines specific to the OS. The Max_Len field indicates the ring size and it can be configured to
either 32 or 64 or 128 or 256 or 512 or 1024, 2048, or 4096 depending on which ring's RCB is being
initialized.
22. Initialize the Receive Producer Ring mailbox registers. The driver must write the value 0x00000000 (clear)
to the low 32 bits of the Receive BD Standard Producer Ring Index mailbox (see “Receive BD Standard
Producer Ring Index Register (offset: 0x5868)” on page 461).
23. Configure the MAC unicast address. See “MAC Address Setup/Configuration” on page 135 for a full
description of unicast MAC address initialization.
24. Configure random backoff seed for transmit. See the Ethernet Transmit Random Backoff register (see
“Ethernet Transmit Random Backoff Register (offset: 0x438)” on page 316). Broadcom recommends using
the following algorithm:
Seed = (MAC_ADDR[0] + MAC_ADDR[1] + MAC_ADDR[2] + MAC_ADDR[3] + MAC_ADDR[4] +
MAC_ADDR[5]) & 0x3FF
Note: Beginning with the BCM57785 and BCM5718 families of controllers, field 15:2 no longer
specifies the maximum expected size of a receive frame (it was formerly “Reserved”).
Note: For the BCM5718 family, do not initialize the Receive Producer Ring NIC Address register
(offset: 0x245C).
Note: The host software must ensure that on systems that support more than 4 GB of physical
memory, Send Rings, Receive Return Rings, Producer Rings, and packet buffers are not allocated
across the 4 GB memory boundary. For example, if the starting memory address of the Standard
Receive Buffer Ring is below 4 GB and the ending address is above 4 GB, a read DMA PCI host
address overflow error may be generated (see “LSO Read DMA Status Register (offset: 0x4804)” on
page 435).
The Standard RX Producer threshold value should be set very low. Some operating systems may run
short of memory resources and the number of BDs that are made available will decrease
proportionally.
The maximum number of Send BDs for a single packet is (0.75)*(ring size).
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