Table of ContentsBCM5718 Programmer’s Guide
Broadcom
®
January 29, 2016 • 5718-PG108-R Page 20
MSI-X Cognizant Host Coalescing ...................................................................................................... 253
Legacy Host Coalescing Parameters........................................................................................... 253
Receive Coalescing Ticks Register (Offset: 0x3c08)........................................................... 253
Send Coalescing Ticks Register (Offset: 0x3c0c)................................................................ 254
Receive Max Coalesced Bd Count Register (Offset: 0x3c10) ............................................. 254
Send Max Coalesced BD Count Register (Offset: 0x3c14) ................................................. 254
Receive Max Coalesced BD Count During Interrupt Register (Offset 0x3c18).................... 255
Send Max Coalesced BD Count During Interrupt Register (Offset 0x3c1c)......................... 255
BCM5718 Family Host Coalescing Parameter Sets .................................................................... 255
MSI-X One Shot Mode ................................................................................................................. 258
Coalesce Now or Forced Update ................................................................................................. 258
Misc Coalescing Controls............................................................................................................. 258
Broadcom Tagged Status Mode (0x68[9]) ........................................................................... 258
Clear Interrupt, Mask Interrupt, Mask Mode (0x68[0], 0x68[1], 0x68[8]).............................. 259
Clear Ticks On Rx Bd Events Mode (0x3c00[9]).................................................................. 259
No Interrupt On Force Update (0x3c00[11])......................................................................... 259
No Interrupt On DMAD Force (0x3c00[12]).......................................................................... 259
Do Not Interrupt On Receives (0x6800[14])......................................................................... 259
End of Receive Stream Interrupt.................................................................................................. 260
Host Coalescing Mode Register (Offset 0x3c00)................................................................. 260
End Stream Debounce Register (Offset 0x3cd4)................................................................. 260
Other Configuration Controls.................................................................................................................. 262
Broadcom Mask Mode ........................................................................................................................ 262
Broadcom Tagged Status Mode.......................................................................................................... 262
Clear Ticks on BD Events Mode ......................................................................................................... 262
No Interrupt on Force Update.............................................................................................................. 262
No Interrupt on DMAD Force............................................................................................................... 262
Section 12: IO Virtualization (IOV) ................................................................................. 263
Data Structure and Register Changes for IOV....................................................................................... 264
Mail Box Register Changes................................................................................................................. 264
Receive Mail Box Register Changes................................................................................................... 264
Send Mail Box Register Changes ....................................................................................................... 264
Ring Control Block Changes ............................................................................................................... 264
VRQ Statistics ..................................................................................................................................... 264
MSI-X Vectors Changes...................................................................................................................... 265
Register Changes................................................................................................................................ 265
IOV – Receive Side................................................................................................................................... 266
IOV – Transmit Side.................................................................................................................................. 267