PCI Configuration RegistersBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 299
CFG_TX_MARGIN 9:7 RW 0 Controls the value of non de-emphasized voltage
level at the TX pins. Path=
i_cfg_func.i_cfg_public.i_cfg_exp_cap Value
used by logic is resolved to the smaller binary
value, if two functions have different values.
SEL_DEEMPHASIS 6 RW 0 When link is operating at Gen2 rates, this bit
selects the level of de-emphasis. Path=
i_cfg_func.i_cfg_public.i_cfg_exp_cap Value
used by logic is resolved to 1 if either function has
this bit set.
HW_AUTO_SPEED_DISABL
E
5 RO 0 Not Supported and hardwired to 0.
Path= i_cfg_func.i_cfg_public.i_cfg_exp_cap
ENTER_COMPLIANCE 4 RW 0 S/W instructs link to enter compliance mode.
Value used by internal logic is set when either
function has this bit enabled.
Path= i_cfg_func.i_cfg_public.i_cfg_exp_cap
Name Bits Access
Default
Value
Description
Value Name Description
0 000 800 – 1200 mV for full swing
and 400 – 600 mV for half
swing.
1 001 Values will be monotonic with
non zero Slope
2 010 Values will be monotonic with
non zero Slope
3 011 200 – 400 mV for full swing
and 100 – 200 mV for half
swing
4 100 Reserved
5 101 Reserved
6110Reserved
7 111 Reserved
255 – end_of_table
Value Name Description
00–
11–
255 – –
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