GRC RegistersBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 469
Interrupt on RX RISC Attention 25 RW 0 Cause a host interrupt when an enabled RX-
RISC attention occurs.
TXCP_ATTN_INT_EN 24 RO 0 TXCP attention bit.
Receive No Pseudo-header
checksum
23 RW 0 Do not include the pseudo-header in the TCP or
UDP checksum calculations. To obtain the
correct checksum, the driver must add the TCP/
UDP checksum field to the pseudo-header
checksum.
Pcie TL/DL/PL mapping bit 22 RO 0 –
NVRAM Write Enable 21 RW 0 The host must set this bit before attempting to
update the Flash or SEEPROM
Note: This bit is only valid when set from GRC
port 0. Setting/clearing of this bit from GRC port
1 does not affect NVRAM write access control.
For BCM5718 family, it is recommended to use
0x7024[1] from all ports to control NVRAM write
access.
Send No Pseudo-header
checksum
20 RW 0 Do not include the pseudo-header in the TCP or
UDP checksum calculations. To obtain the
correct checksum, the driver must seed the TCP/
UDP checksum field with the pseudo-header
checksum.
Time Sync Mode Enable 19 RW 0 Write 1 to this bit to enable Time Sync Mode.
HTX2B Feature Enable
(BCM5720)
18 RW 0 Write 1 to enable TX-MAC to route HTX2B
packets to the APE. Firmware may enable/
disable this in flight with careful coordination.
Host Send BDs 17 RW 0 Use host-based BD rings instead of NIC-based
BD rings.
Host Stack Up 16 RW 0 The host stack is ready to receive data from the
NIC.
B2HRX Feature Enable 15 RW 0 Write 1 to enable DMA Engine to route B2HRX
packets to PCIe. Firmware may enable/disable
this in flight with careful coordination.
Don't Interrupt on Receives 14 RW 0 Never cause an interrupt on receive return ring
producer updates.
Don't Interrupt on Sends 13 RW 0 Never cause an interrupt on send BD ring
producer updates.
DW_SYS_ATTN 12 RO 0 WDMA attention bit.
Allow Bad Frames 11 RW 0 The RX MAC forwards illegal frames to the NIC
and marks them as such instead of discarding
them. The frames are queued based on default
class and interrupt distribution queue number.
NO_CRC 10 RO 0 –
Name Bits Access
Default
Value
Description
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